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* i8086: When a ref points to the 32-bit data, preload the ref base to a temp register to reduce spilling.

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git-svn-id: trunk@46204 -
This commit is contained in:
yury 2020-08-03 18:52:17 +00:00
parent ddea929923
commit 0000682043
1 changed files with 28 additions and 0 deletions
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28
compiler/i8086/cgcpu.pas
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@ -1730,12 +1730,30 @@ unit cgcpu;
end; end;
OS_16: OS_16:
begin begin
{ Preload the ref base to reduce spilling }
if (tmpref.base<>NR_NO) and
(tmpref.index<>NR_NO) and
(getsupreg(tmpref.base)>=first_int_imreg) then
begin
tmpreg:=getaddressregister(list);
a_load_reg_reg(list,OS_ADDR,OS_ADDR,tmpref.base,tmpreg);
tmpref.base:=tmpreg;
end;
list.concat(taicpu.op_reg_ref(A_MOV, S_W, reg, tmpref)); list.concat(taicpu.op_reg_ref(A_MOV, S_W, reg, tmpref));
inc(tmpref.offset, 2); inc(tmpref.offset, 2);
list.concat(taicpu.op_const_ref(A_MOV, S_W, 0, tmpref)); list.concat(taicpu.op_const_ref(A_MOV, S_W, 0, tmpref));
end; end;
OS_32,OS_S32: OS_32,OS_S32:
begin begin
{ Preload the ref base to reduce spilling }
if (tmpref.base<>NR_NO) and
(tmpref.index<>NR_NO) and
(getsupreg(tmpref.base)>=first_int_imreg) then
begin
tmpreg:=getaddressregister(list);
a_load_reg_reg(list,OS_ADDR,OS_ADDR,tmpref.base,tmpreg);
tmpref.base:=tmpreg;
end;
list.concat(taicpu.op_reg_ref(A_MOV, S_W, reg, tmpref)); list.concat(taicpu.op_reg_ref(A_MOV, S_W, reg, tmpref));
inc(tmpref.offset, 2); inc(tmpref.offset, 2);
list.concat(taicpu.op_reg_ref(A_MOV, S_W, GetNextReg(reg), tmpref)); list.concat(taicpu.op_reg_ref(A_MOV, S_W, GetNextReg(reg), tmpref));
@ -1762,6 +1780,7 @@ unit cgcpu;
var var
tmpref : treference; tmpref : treference;
tmpreg : tregister;
begin begin
tmpref:=ref; tmpref:=ref;
make_simple_ref(list,tmpref,isdirect); make_simple_ref(list,tmpref,isdirect);
@ -1857,6 +1876,15 @@ unit cgcpu;
end; end;
OS_32,OS_S32: OS_32,OS_S32:
begin begin
{ Preload the ref base to reduce spilling }
if (tmpref.base<>NR_NO) and
(tmpref.index<>NR_NO) and
(getsupreg(tmpref.base)>=first_int_imreg) then
begin
tmpreg:=getaddressregister(list);
a_load_reg_reg(list,OS_ADDR,OS_ADDR,tmpref.base,tmpreg);
tmpref.base:=tmpreg;
end;
list.concat(taicpu.op_ref_reg(A_MOV, S_W, tmpref, reg)); list.concat(taicpu.op_ref_reg(A_MOV, S_W, tmpref, reg));
inc(tmpref.offset, 2); inc(tmpref.offset, 2);
list.concat(taicpu.op_ref_reg(A_MOV, S_W, tmpref, GetNextReg(reg))); list.concat(taicpu.op_ref_reg(A_MOV, S_W, tmpref, GetNextReg(reg)));