+ condition and shifterop operands for AArch64 assembler reader

git-svn-id: trunk@29895 -
This commit is contained in:
Jonas Maebe 2015-02-23 22:51:38 +00:00
parent 665a5e509e
commit 00b819307a

View File

@ -69,6 +69,10 @@ type
OPR_MODEFLAGS : (flags : tcpumodeflags); OPR_MODEFLAGS : (flags : tcpumodeflags);
OPR_SPECIALREG: (specialreg : tregister; specialregflags : tspecialregflags); OPR_SPECIALREG: (specialreg : tregister; specialregflags : tspecialregflags);
{$endif arm} {$endif arm}
{$ifdef aarch64}
OPR_SHIFTEROP : (shifterop : tshifterop);
OPR_COND : (cc : tasmcond);
{$endif aarch64}
end; end;
TOperand = class TOperand = class
@ -1062,15 +1066,17 @@ end;
{$ifdef ARM} {$ifdef ARM}
OPR_REGSET: OPR_REGSET:
ai.loadregset(i-1,regtype,subreg,regset,usermode); ai.loadregset(i-1,regtype,subreg,regset,usermode);
OPR_SHIFTEROP:
ai.loadshifterop(i-1,shifterop);
OPR_COND:
ai.loadconditioncode(i-1,cc);
OPR_MODEFLAGS: OPR_MODEFLAGS:
ai.loadmodeflags(i-1,flags); ai.loadmodeflags(i-1,flags);
OPR_SPECIALREG: OPR_SPECIALREG:
ai.loadspecialreg(i-1,specialreg,specialregflags); ai.loadspecialreg(i-1,specialreg,specialregflags);
{$endif ARM} {$endif ARM}
{$if defined(arm) or defined(aarch64)}
OPR_SHIFTEROP:
ai.loadshifterop(i-1,shifterop);
OPR_COND:
ai.loadconditioncode(i-1,cc);
{$endif arm or aarch64}
{ ignore wrong operand } { ignore wrong operand }
OPR_NONE: OPR_NONE:
; ;