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* fixed instruction matching when a size flag is specified for all
operands
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@ -818,7 +818,8 @@ function taicpu.Matches(p:PInsEntry):longint;
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* required to have unspecified size in the instruction too...)
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}
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var
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i,siz,oprs : longint;
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i,j,asize,oprs : longint;
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siz : array[0..2] of longint;
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begin
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Matches:=100;
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@ -859,14 +860,36 @@ begin
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{ as default an untyped size can get all the sizes, this is different
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from nasm, but else we need to do a lot checking which opcodes want
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size or not with the automatic size generation }
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siz:=$ffffffff;
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asize:=$ffffffff;
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if (p^.flags and IF_SB)<>0 then
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siz:=OT_BITS8
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asize:=OT_BITS8
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else if (p^.flags and IF_SW)<>0 then
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siz:=OT_BITS16
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asize:=OT_BITS16
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else if (p^.flags and IF_SD)<>0 then
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siz:=OT_BITS32
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else if (p^.flags and (IF_SM or IF_SM2))<>0 then
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asize:=OT_BITS32;
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if (p^.flags and IF_ARMASK)<>0 then
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begin
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siz[0]:=0;
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siz[1]:=0;
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siz[2]:=0;
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if (p^.flags and IF_AR0)<>0 then
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siz[0]:=asize
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else if (p^.flags and IF_AR1)<>0 then
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siz[1]:=asize
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else if (p^.flags and IF_AR2)<>0 then
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siz[2]:=asize;
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end
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else
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begin
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{ siz[0]:=asize;
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siz[1]:=asize;
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siz[2]:=asize; }
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{ we can leave because the size for all operands is forced to be
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the same }
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exit;
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end;
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if (p^.flags and (IF_SM or IF_SM2))<>0 then
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begin
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if (p^.flags and IF_SM2)<>0 then
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oprs:=2
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@ -875,19 +898,22 @@ begin
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for i:=0 to oprs-1 do
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if ((p^.optypes[i] and OT_SIZE_MASK) <> 0) then
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begin
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siz:=p^.optypes[i] and OT_SIZE_MASK;
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for j:=0 to oprs-1 do
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siz[j]:=p^.optypes[i] and OT_SIZE_MASK;
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break;
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end;
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end;
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end
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else
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oprs:=2;
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{ Check operand sizes }
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for i:=0to p^.ops-1 do
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begin
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if ((p^.optypes[i] and OT_SIZE_MASK)=0) and
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((oper[i].ot and OT_SIZE_MASK and (not siz))<>0) and
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((oper[i].ot and OT_SIZE_MASK and (not siz[i]))<>0) and
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{ Immediates can always include smaller size }
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((oper[i].ot and OT_IMMEDIATE)=0) and
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(((p^.optypes[i] and OT_SIZE_MASK) or siz)<(oper[i].ot and OT_SIZE_MASK)) then
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(((p^.optypes[i] and OT_SIZE_MASK) or siz[i])<(oper[i].ot and OT_SIZE_MASK)) then
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Matches:=2;
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end;
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end;
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@ -1647,7 +1673,11 @@ end;
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end.
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{
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$Log$
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Revision 1.14 2000-05-12 21:26:22 pierre
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Revision 1.15 2000-05-23 20:34:35 peter
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* fixed instruction matching when a size flag is specified for all
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operands
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Revision 1.14 2000/05/12 21:26:22 pierre
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* fix the FDIV FDIVR FSUB FSUBR and popping equivalent
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simply by swapping from reverse to normal and vice-versa
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when passing from one syntax to the other !
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@ -1699,4 +1729,4 @@ end.
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Revision 1.17 1999/08/01 23:55:53 michael
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* Moved taitempalloc
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}
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}
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