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* correct change information for some instructions where the change

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information cannot be modelled in x86ins.dat
This commit is contained in:
florian 2024-06-01 18:46:23 +02:00
parent ba555ea68d
commit 055681c8b4
2 changed files with 28 additions and 2 deletions
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23
compiler/x86/aasmcpu.pas
View File

@ -4747,6 +4747,29 @@ implementation
internalerror(200506055); internalerror(200506055);
end end
end end
else if (opcode=VMOVHPD) or (opcode=VMOVHPS) or (opcode=VMOVLHPS) or (opcode=VMOVLPD) or (opcode=VMOVLPS) then
begin
if ops=2 then
case opnr of
0:
result:=operand_read;
1:
result:=operand_readwrite;
else
internalerror(2024060101);
end
else if ops=3 then
case opnr of
0,1:
result:=operand_read;
2:
result:=operand_write;
else
internalerror(̄2024060102);
end
else
internalerror(2024060103);
end
{ IMUL has 1, 2 and 3-operand forms } { IMUL has 1, 2 and 3-operand forms }
else if opcode=A_IMUL then else if opcode=A_IMUL then
begin begin

7
compiler/x86/x86ins.dat
View File

@ -4530,32 +4530,35 @@ ymmrm,ymmreg \333\362\364\370\1\x7F\101 AVX,SA
(Ch_Wop3, Ch_Rop2, Ch_Rop1) (Ch_Wop3, Ch_Rop2, Ch_Rop1)
xmmreg,xmmreg,xmmreg \350\362\370\1\x12\75\120 AVX,SANDYBRIDGE xmmreg,xmmreg,xmmreg \350\362\370\1\x12\75\120 AVX,SANDYBRIDGE
; 2/3 operands cannot be modeled here, it is corrected in taicpu.spilling_get_operation_type
[VMOVHPD] [VMOVHPD]
(Ch_All) (Ch_All)
mem64,xmmreg \350\352\361\362\370\1\x17\101 AVX,SANDYBRIDGE,T1S mem64,xmmreg \350\352\361\362\370\1\x17\101 AVX,SANDYBRIDGE,T1S
xmmreg,xmmreg,mem64 \350\352\361\362\370\1\x16\75\120 AVX,SANDYBRIDGE,T1S xmmreg,xmmreg,mem64 \350\352\361\362\370\1\x16\75\120 AVX,SANDYBRIDGE,T1S
; 2/3 operands cannot be modeled here, it is corrected in taicpu.spilling_get_operation_type
[VMOVHPS] [VMOVHPS]
(Ch_All) (Ch_All)
mem64,xmmreg \350\362\370\1\x17\101 AVX,SANDYBRIDGE,T2 mem64,xmmreg \350\362\370\1\x17\101 AVX,SANDYBRIDGE,T2
xmmreg,xmmreg,mem64 \350\362\370\1\x16\75\120 AVX,SANDYBRIDGE,T2 xmmreg,xmmreg,mem64 \350\362\370\1\x16\75\120 AVX,SANDYBRIDGE,T2
; 2/3 operands cannot be modeled here, it is corrected in taicpu.spilling_get_operation_type
[VMOVLHPS] [VMOVLHPS]
(Ch_All) (Ch_All)
xmmreg,xmmreg,xmmreg \350\362\370\1\x16\75\120 AVX,SANDYBRIDGE xmmreg,xmmreg,xmmreg \350\362\370\1\x16\75\120 AVX,SANDYBRIDGE
; 2/3 operands cannot be modeled here, it is corrected in taicpu.spilling_get_operation_type
[VMOVLPD] [VMOVLPD]
(Ch_All) (Ch_All)
mem64,xmmreg \350\352\361\362\370\1\x13\101 AVX,SANDYBRIDGE,T1S mem64,xmmreg \350\352\361\362\370\1\x13\101 AVX,SANDYBRIDGE,T1S
xmmreg,xmmreg,mem64 \350\352\361\362\370\1\x12\75\120 AVX,SANDYBRIDGE,T1S xmmreg,xmmreg,mem64 \350\352\361\362\370\1\x12\75\120 AVX,SANDYBRIDGE,T1S
; 2/3 operands cannot be modeled here, it is corrected in taicpu.spilling_get_operation_type
[VMOVLPS] [VMOVLPS]
(Ch_All) (Ch_All)
mem64,xmmreg \350\362\370\1\x13\101 AVX,SANDYBRIDGE,T2 mem64,xmmreg \350\362\370\1\x13\101 AVX,SANDYBRIDGE,T2
xmmreg,xmmreg,mem64 \350\362\370\1\x12\75\120 AVX,SANDYBRIDGE,T2 xmmreg,xmmreg,mem64 \350\362\370\1\x12\75\120 AVX,SANDYBRIDGE,T2
[VMOVMSKPD] [VMOVMSKPD]
(Ch_Wop2, Ch_Rop1) (Ch_Wop2, Ch_Rop1)
reg32,ymmreg \361\362\364\370\1\x50\110 AVX,SANDYBRIDGE reg32,ymmreg \361\362\364\370\1\x50\110 AVX,SANDYBRIDGE