From 05b919b82136bde27e9b4e661430b01f7c3156ea Mon Sep 17 00:00:00 2001 From: Jonas Maebe Date: Sat, 20 Aug 2011 07:37:04 +0000 Subject: [PATCH] + very basic tcgjvm (basically only implements the register allocator initialisation in addition to what tcg already supports) git-svn-id: branches/jvmbackend@18305 - --- .gitattributes | 1 + compiler/jvm/cgcpu.pas | 99 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 100 insertions(+) create mode 100644 compiler/jvm/cgcpu.pas diff --git a/.gitattributes b/.gitattributes index 4f3e6da15f..c8b67b73fd 100644 --- a/.gitattributes +++ b/.gitattributes @@ -207,6 +207,7 @@ compiler/ia64/ia64reg.dat svneol=native#text/plain compiler/impdef.pas svneol=native#text/plain compiler/import.pas svneol=native#text/plain compiler/jvm/aasmcpu.pas svneol=native#text/plain +compiler/jvm/cgcpu.pas svneol=native#text/plain compiler/jvm/cpubase.pas svneol=native#text/plain compiler/jvm/cpuinfo.pas svneol=native#text/plain compiler/jvm/jvmreg.dat svneol=native#text/plain diff --git a/compiler/jvm/cgcpu.pas b/compiler/jvm/cgcpu.pas new file mode 100644 index 0000000000..86fa073a13 --- /dev/null +++ b/compiler/jvm/cgcpu.pas @@ -0,0 +1,99 @@ +{ + Copyright (c) 2010 by Jonas Maebe + + This unit implements the code generator for the Java VM + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + + **************************************************************************** +} +unit cgcpu; + +{$i fpcdefs.inc} + +interface + + uses + globtype,parabase, + cgbase,cgutils,cgobj, + aasmbase,aasmtai,aasmdata,aasmcpu, + cpubase,cpuinfo, + node,symconst,SymType,symdef, + rgcpu; + + type + TCgJvm=class(tcg) + public + procedure init_register_allocators;override; + procedure done_register_allocators;override; + function getfpuregister(list:TAsmList;size:Tcgsize):Tregister;override; + end; + + procedure create_codegen; + +implementation + + uses + globals,verbose,systems,cutils, + paramgr,fmodule, + tgobj, + procinfo,cpupi; + + +{**************************************************************************** + Assembler code +****************************************************************************} + + procedure tcgjvm.init_register_allocators; + begin + inherited init_register_allocators; +{$ifndef cpu64bitaddr} + rg[R_INTREGISTER]:=Trgcpu.create(R_INTREGISTER,R_SUBD, + [RS_R0],first_int_imreg,[]); +{$else not cpu64bitaddr} + rg[R_INTREGISTER]:=Trgcpu.create(R_INTREGISTER,R_SUBQ, + [RS_R0],first_int_imreg,[]); +{$endif not cpu64bitaddr} + rg[R_FPUREGISTER]:=trgcpu.create(R_FPUREGISTER,R_SUBFD, + [RS_R0],first_fpu_imreg,[]); + rg[R_MMREGISTER]:=trgcpu.create(R_MMREGISTER,R_SUBNONE, + [RS_R0],first_mm_imreg,[]); + end; + + + procedure tcgjvm.done_register_allocators; + begin + rg[R_INTREGISTER].free; + rg[R_FPUREGISTER].free; + rg[R_MMREGISTER].free; + inherited done_register_allocators; + end; + + + function tcgjvm.getfpuregister(list:TAsmList;size:Tcgsize):Tregister; + begin + if size=OS_F64 then + result:=rg[R_FPUREGISTER].getregister(list,R_SUBFD) + else + result:=rg[R_FPUREGISTER].getregister(list,R_SUBFS); + end; + + + procedure create_codegen; + begin + cg:=tcgjvm.Create; + end; + +end.