diff --git a/compiler/avr/navradd.pas b/compiler/avr/navradd.pas index 9347f5e989..6dc507c3fc 100644 --- a/compiler/avr/navradd.pas +++ b/compiler/avr/navradd.pas @@ -31,12 +31,13 @@ interface type tavraddnode = class(tcgaddnode) private - function GetResFlags(unsigned:Boolean):TResFlags; + function GetResFlags(unsigned:Boolean):TResFlags; protected - function pass_1 : tnode;override; - procedure second_cmpordinal;override; - procedure second_cmpsmallset;override; - procedure second_cmp64bit;override; + function pass_1 : tnode;override; + procedure second_cmpordinal;override; + procedure second_cmpsmallset;override; + procedure second_cmp64bit;override; + procedure second_cmp; end; implementation @@ -160,65 +161,35 @@ interface end; - procedure tavraddnode.second_cmp64bit; + procedure tavraddnode.second_cmp; var unsigned : boolean; - oldnodetype : tnodetype; + tmpreg1,tmpreg2 : tregister; + i : longint; begin - { pass_left_right; - force_reg_left_right(false,false); + force_reg_left_right(true,false); unsigned:=not(is_signed(left.resultdef)) or not(is_signed(right.resultdef)); - { operation requiring proper N, Z and C flags ? } - if unsigned or (nodetype in [equaln,unequaln]) then + current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CP,left.location.register,right.location.register)); + tmpreg1:=left.location.register; + tmpreg2:=right.location.register; + + for i:=2 to tcgsize2size[left.location.size] do begin - location_reset(location,LOC_FLAGS,OS_NO); - location.resflags:=getresflags(unsigned); - current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CMP,left.location.register64.reghi,right.location.register64.reghi)); - current_asmdata.CurrAsmList.concat(setcondition(taicpu.op_reg_reg(A_CMP,left.location.register64.reglo,right.location.register64.reglo),C_EQ)); - end - else - { operation requiring proper N, Z and V flags ? } - begin - location_reset(location,LOC_JUMP,OS_NO); - current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CMP,left.location.register64.reghi,right.location.register64.reghi)); - { the jump the sequence is a little bit hairy } - case nodetype of - ltn,gtn: - begin - cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(false),current_procinfo.CurrTrueLabel); - { cheat a little bit for the negative test } - toggleflag(nf_swapped); - cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(false),current_procinfo.CurrFalseLabel); - toggleflag(nf_swapped); - end; - lten,gten: - begin - oldnodetype:=nodetype; - if nodetype=lten then - nodetype:=ltn - else - nodetype:=gtn; - cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),current_procinfo.CurrTrueLabel); - { cheat for the negative test } - if nodetype=ltn then - nodetype:=gtn - else - nodetype:=ltn; - cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),current_procinfo.CurrFalseLabel); - nodetype:=oldnodetype; - end; - end; - current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CMP,left.location.register64.reglo,right.location.register64.reglo)); - { the comparisaion of the low dword have to be - always unsigned! } - cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),current_procinfo.CurrTrueLabel); - cg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel); + current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CPC,tmpreg1,tmpreg2)); end; - } + + location_reset(location,LOC_FLAGS,OS_NO); + location.resflags:=getresflags(unsigned); + end; + + + procedure tavraddnode.second_cmp64bit; + begin + second_cmp; end; @@ -238,36 +209,8 @@ interface procedure tavraddnode.second_cmpordinal; - var - unsigned : boolean; - tmpreg : tregister; - b : byte; begin - { - pass_left_right; - force_reg_left_right(true,true); - - unsigned:=not(is_signed(left.resultdef)) or - not(is_signed(right.resultdef)); - - if right.location.loc = LOC_CONSTANT then - begin - if is_shifter_const(right.location.value,b) then - current_asmdata.CurrAsmList.concat(taicpu.op_reg_const(A_CMP,left.location.register,right.location.value)) - else - begin - tmpreg:=cg.getintregister(current_asmdata.CurrAsmList,location.size); - cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT, - right.location.value,tmpreg); - current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CMP,left.location.register,tmpreg)); - end; - end - else - current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CMP,left.location.register,right.location.register)); - - location_reset(location,LOC_FLAGS,OS_NO); - location.resflags:=getresflags(unsigned); - } + second_cmp; end; begin diff --git a/compiler/avr/rgcpu.pas b/compiler/avr/rgcpu.pas index 73582d6f6e..34e5f728b0 100644 --- a/compiler/avr/rgcpu.pas +++ b/compiler/avr/rgcpu.pas @@ -35,6 +35,7 @@ unit rgcpu; type trgcpu = class(trgobj) + procedure add_constraints(reg:tregister);override; procedure do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);override; procedure do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);override; end; @@ -51,6 +52,42 @@ unit rgcpu; procinfo; + procedure trgcpu.add_constraints(reg:tregister); + var + supreg,i : Tsuperregister; + begin + case getsubreg(reg) of + { Let 64bit floats conflict with all odd float regs } + R_SUBFD: + begin + { + supreg:=getsupreg(reg); + i:=RS_F1; + while (i<=RS_F31) do + begin + add_edge(supreg,i); + inc(i,2); + end; + } + end; + { Let 64bit ints conflict with all odd int regs } + R_SUBQ: + begin + supreg:=getsupreg(reg); + { + i:=RS_G1; + while (i<=RS_I7) do + begin + add_edge(supreg,i); + inc(i,2); + end; + } + end; + end; + end; + + + procedure trgcpu.do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister); begin inherited do_spill_read(list,pos,spilltemp,tempreg); diff --git a/compiler/ppcavr.lpi b/compiler/ppcavr.lpi index 1d50ab4432..9c45ba9a14 100644 --- a/compiler/ppcavr.lpi +++ b/compiler/ppcavr.lpi @@ -2,7 +2,7 @@ - + diff --git a/rtl/embedded/rtl.cfg b/rtl/embedded/rtl.cfg index cf3238bbda..7d4c906f32 100644 --- a/rtl/embedded/rtl.cfg +++ b/rtl/embedded/rtl.cfg @@ -3,10 +3,10 @@ # uncomment to enable the stuff you want to use # include full heap management into the rtl -# -SfFPC_FEATURE_HAS_HEAP +# -SfHEAP # include support for init final code of units into the rtl -# -SfFPC_HAS_FEATURE_INITFINAL +# -SfINITFINAL # include exit code support -# -SfFPC_HAS_FEATURE_EXITCODE +-SfEXITCODE