mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-04-16 05:59:28 +02:00
+ inlined versions of concatcopy
git-svn-id: trunk@29959 -
This commit is contained in:
Jonas Maebe
parent
e6ab39765d
commit
07455fb889
@ -92,9 +92,8 @@ interface
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procedure g_maybe_got_init(list: TAsmList); override;
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procedure g_restore_registers(list: TAsmList);override;
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procedure g_save_registers(list: TAsmList);override;
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procedure g_concatcopy_move(list: TAsmList; const source, dest: treference; len: tcgint);
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procedure g_concatcopy(list: TAsmList; const source, dest: treference; len: tcgint);override;
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procedure g_concatcopy_unaligned(list: TAsmList; const source, dest: treference; len: tcgint);override;
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procedure g_concatcopy_move(list: TAsmList; const source, dest: treference; len : tcgint);
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procedure g_adjust_self_value(list: TAsmList; procdef: tprocdef; ioffset: tcgint);override;
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procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);override;
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private
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@ -1468,7 +1467,6 @@ implementation
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end;
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procedure tcgaarch64.g_proc_entry(list: TAsmList; localsize: longint; nostackframe: boolean);
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var
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ref: treference;
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@ -1676,152 +1674,433 @@ implementation
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end;
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procedure tcgaarch64.g_concatcopy(list:TAsmList;const source,dest:treference;len:tcgint);
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(*
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procedure tcgaarch64.g_concatcopy(list: TAsmList; const source, dest: treference; len: tcgint);
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var
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tmpreg1,
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hreg,
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countreg: tregister;
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src, dst: treference;
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lab: tasmlabel;
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count, count2: aint;
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*)
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begin
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(*
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{ anybody wants to determine a good value here :)? }
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if len>100 then
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*)
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g_concatcopy_move(list,source,dest,len)
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(*
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else
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begin
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count:=len div 4;
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if (count<=4) and reference_is_reusable(source) then
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src:=source
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else
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sourcebasereplaced, destbasereplaced: boolean;
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{ get optimal memory operation to use for loading/storing data
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in an unrolled loop }
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procedure getmemop(scaledop, unscaledop: tasmop; const startref, endref: treference; opsize: tcgsize; postfix: toppostfix; out memop: tasmop; out needsimplify: boolean);
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begin
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if (simple_ref_type(scaledop,opsize,postfix,startref)=sr_simple) and
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(simple_ref_type(scaledop,opsize,postfix,endref)=sr_simple) then
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begin
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memop:=unscaledop;
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needsimplify:=true;
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end
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else if (unscaledop<>A_NONE) and
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(simple_ref_type(unscaledop,opsize,postfix,startref)=sr_simple) and
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(simple_ref_type(unscaledop,opsize,postfix,endref)=sr_simple) then
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begin
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memop:=unscaledop;
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needsimplify:=false;
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end
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else
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begin
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memop:=scaledop;
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needsimplify:=true;
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end;
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end;
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{ adjust the offset and/or addressing mode after a load/store so it's
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correct for the next one of the same size }
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procedure updaterefafterloadstore(var ref: treference; oplen: longint);
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begin
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case ref.addressmode of
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AM_OFFSET:
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inc(ref.offset,oplen);
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AM_POSTINDEXED:
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{ base register updated by instruction, next offset can remain
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the same }
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;
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AM_PREINDEXED:
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begin
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reference_reset_base(src,getintregister(list,OS_ADDR),0,sizeof(aint));
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a_loadaddr_ref_reg(list,source,src.base);
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end;
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if (count<=4) and reference_is_reusable(dest) then
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dst:=dest
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else
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begin
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reference_reset_base(dst,getintregister(list,OS_ADDR),0,sizeof(aint));
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a_loadaddr_ref_reg(list,dest,dst.base);
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end;
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{ generate a loop }
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if count>4 then
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begin
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countreg:=GetIntRegister(list,OS_INT);
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tmpreg1:=GetIntRegister(list,OS_INT);
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a_load_const_reg(list,OS_INT,count,countreg);
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current_asmdata.getjumplabel(lab);
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a_label(list, lab);
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list.concat(taicpu.op_ref_reg(A_LD,src,tmpreg1));
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list.concat(taicpu.op_reg_ref(A_ST,tmpreg1,dst));
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list.concat(taicpu.op_reg_const_reg(A_ADD,src.base,4,src.base));
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list.concat(taicpu.op_reg_const_reg(A_ADD,dst.base,4,dst.base));
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list.concat(taicpu.op_reg_const_reg(A_SUBcc,countreg,1,countreg));
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a_jmp_cond(list,OC_NE,lab);
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len := len mod 4;
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end;
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{ unrolled loop }
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count:=len div 4;
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if count>0 then
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begin
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tmpreg1:=GetIntRegister(list,OS_INT);
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for count2 := 1 to count do
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begin
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list.concat(taicpu.op_ref_reg(A_LD,src,tmpreg1));
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list.concat(taicpu.op_reg_ref(A_ST,tmpreg1,dst));
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inc(src.offset,4);
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inc(dst.offset,4);
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end;
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len := len mod 4;
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end;
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if (len and 4) <> 0 then
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begin
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hreg:=GetIntRegister(list,OS_INT);
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a_load_ref_reg(list,OS_32,OS_32,src,hreg);
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a_load_reg_ref(list,OS_32,OS_32,hreg,dst);
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inc(src.offset,4);
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inc(dst.offset,4);
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end;
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{ copy the leftovers }
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if (len and 2) <> 0 then
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begin
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hreg:=GetIntRegister(list,OS_INT);
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a_load_ref_reg(list,OS_16,OS_16,src,hreg);
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a_load_reg_ref(list,OS_16,OS_16,hreg,dst);
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inc(src.offset,2);
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inc(dst.offset,2);
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end;
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if (len and 1) <> 0 then
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begin
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hreg:=GetIntRegister(list,OS_INT);
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a_load_ref_reg(list,OS_8,OS_8,src,hreg);
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a_load_reg_ref(list,OS_8,OS_8,hreg,dst);
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{ base register updated by instruction -> next instruction can
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use post-indexing with offset = sizeof(operation) }
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ref.offset:=0;
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ref.addressmode:=AM_OFFSET;
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end;
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end;
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*)
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end;
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end;
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{ generate a load/store and adjust the reference offset to the next
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memory location if necessary }
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procedure genloadstore(list: TAsmList; op: tasmop; reg: tregister; var ref: treference; postfix: toppostfix; opsize: tcgsize);
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begin
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list.concat(setoppostfix(taicpu.op_reg_ref(op,reg,ref),postfix));
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updaterefafterloadstore(ref,tcgsize2size[opsize]);
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end;
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{ generate a dual load/store (ldp/stp) and adjust the reference offset to
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the next memory location if necessary }
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procedure gendualloadstore(list: TAsmList; op: tasmop; reg1, reg2: tregister; var ref: treference; postfix: toppostfix; opsize: tcgsize);
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begin
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list.concat(setoppostfix(taicpu.op_reg_reg_ref(op,reg1,reg2,ref),postfix));
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updaterefafterloadstore(ref,tcgsize2size[opsize]*2);
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end;
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{ turn a reference into a pre- or post-indexed reference for use in a
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load/store of a particular size }
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procedure makesimpleforcopy(list: TAsmList; var scaledop: tasmop; opsize: tcgsize; postfix: toppostfix; forcepostindexing: boolean; var ref: treference; var basereplaced: boolean);
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var
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tmpreg: tregister;
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scaledoffset: longint;
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orgaddressmode: taddressmode;
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begin
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scaledoffset:=tcgsize2size[opsize];
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if scaledop in [A_LDP,A_STP] then
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scaledoffset:=scaledoffset*2;
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{ can we use the reference as post-indexed without changes? }
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if forcepostindexing then
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begin
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orgaddressmode:=ref.addressmode;
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ref.addressmode:=AM_POSTINDEXED;
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if (orgaddressmode=AM_POSTINDEXED) or
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((ref.offset=0) and
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(simple_ref_type(scaledop,opsize,postfix,ref)=sr_simple)) then
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begin
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{ just change the post-indexed offset to the access size }
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ref.offset:=scaledoffset;
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{ and replace the base register if that didn't happen yet
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(could be sp or a regvar) }
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if not basereplaced then
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begin
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tmpreg:=getaddressregister(list);
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a_load_reg_reg(list,OS_ADDR,OS_ADDR,ref.base,tmpreg);
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ref.base:=tmpreg;
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basereplaced:=true;
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end;
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exit;
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end;
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ref.addressmode:=orgaddressmode;
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end;
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{$ifdef dummy}
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This could in theory be useful in case you have a concatcopy from
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e.g. x1+255 to x1+267 *and* the reference is aligned, but this seems
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very unlikely. Disabled because it still needs fixes, as it
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also generates pre-indexed loads right now at the very end for the
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left-over gencopies
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{ can we turn it into a pre-indexed reference for free? (after the
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first operation, it will be turned into an offset one) }
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if not forcepostindexing and
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(ref.offset<>0) then
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begin
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orgaddressmode:=ref.addressmode;
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ref.addressmode:=AM_PREINDEXED;
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tmpreg:=ref.base;
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if not basereplaced and
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(ref.base=tmpreg) then
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begin
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tmpreg:=getaddressregister(list);
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a_load_reg_reg(list,OS_ADDR,OS_ADDR,ref.base,tmpreg);
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ref.base:=tmpreg;
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basereplaced:=true;
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end;
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if simple_ref_type(scaledop,opsize,postfix,ref)<>sr_simple then
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make_simple_ref(list,scaledop,opsize,postfix,ref,NR_NO);
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exit;
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end;
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{$endif dummy}
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if not forcepostindexing then
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begin
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ref.addressmode:=AM_OFFSET;
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make_simple_ref(list,scaledop,opsize,postfix,ref,NR_NO);
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{ this may still cause problems if the final offset is no longer
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a simple ref; it's a bit complicated to pass all information
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through at all places and check that here, so play safe: we
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currently never generate unrolled copies for more than 64
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bytes (32 with non-double-register copies) }
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if ref.index=NR_NO then
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begin
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if ((scaledop in [A_LDP,A_STP]) and
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(ref.offset<((64-8)*tcgsize2size[opsize]))) or
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((scaledop in [A_LDUR,A_STUR]) and
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(ref.offset<(255-8*tcgsize2size[opsize]))) or
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((scaledop in [A_LDR,A_STR]) and
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(ref.offset<((4096-8)*tcgsize2size[opsize]))) then
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exit;
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end;
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end;
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tmpreg:=getaddressregister(list);
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a_loadaddr_ref_reg(list,ref,tmpreg);
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basereplaced:=true;
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if forcepostindexing then
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begin
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reference_reset_base(ref,tmpreg,scaledoffset,ref.alignment);
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ref.addressmode:=AM_POSTINDEXED;
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end
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else
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begin
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reference_reset_base(ref,tmpreg,0,ref.alignment);
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ref.addressmode:=AM_OFFSET;
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end
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end;
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{ prepare a reference for use by gencopy. This is done both after the
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unrolled and regular copy loop -> get rid of post-indexing mode, make
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sure ref is valid }
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procedure preparecopy(list: tasmlist; scaledop, unscaledop: tasmop; var ref: treference; opsize: tcgsize; postfix: toppostfix; out op: tasmop; var basereplaced: boolean);
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var
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simplify: boolean;
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begin
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if ref.addressmode=AM_POSTINDEXED then
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ref.offset:=tcgsize2size[opsize];
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getmemop(scaledop,scaledop,ref,ref,opsize,postfix,op,simplify);
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if simplify then
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begin
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makesimpleforcopy(list,scaledop,opsize,postfix,false,ref,basereplaced);
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op:=scaledop;
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end;
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end;
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{ generate a copy from source to dest of size opsize/postfix }
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procedure gencopy(list: TAsmList; var source, dest: treference; postfix: toppostfix; opsize: tcgsize);
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var
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reg: tregister;
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loadop, storeop: tasmop;
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begin
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preparecopy(list,A_LDR,A_LDUR,source,opsize,postfix,loadop,sourcebasereplaced);
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preparecopy(list,A_STR,A_STUR,dest,opsize,postfix,storeop,destbasereplaced);
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reg:=getintregister(list,opsize);
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genloadstore(list,loadop,reg,source,postfix,opsize);
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genloadstore(list,storeop,reg,dest,postfix,opsize);
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end;
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procedure tcgaarch64.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : tcgint);
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(*
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{ copy the leftovers after an unrolled or regular copy loop }
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procedure gencopyleftovers(list: TAsmList; var source, dest: treference; len: longint);
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begin
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{ stop post-indexing if we did so in the loop, since in that case all
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offsets definitely can be represented now }
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if source.addressmode=AM_POSTINDEXED then
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begin
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source.addressmode:=AM_OFFSET;
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source.offset:=0;
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end;
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if dest.addressmode=AM_POSTINDEXED then
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begin
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dest.addressmode:=AM_OFFSET;
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dest.offset:=0;
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end;
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{ transfer the leftovers }
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if len>=8 then
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begin
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dec(len,8);
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gencopy(list,source,dest,PF_NONE,OS_64);
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end;
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if len>=4 then
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begin
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dec(len,4);
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gencopy(list,source,dest,PF_NONE,OS_32);
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end;
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if len>=2 then
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begin
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dec(len,2);
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gencopy(list,source,dest,PF_H,OS_16);
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end;
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if len>=1 then
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begin
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dec(len);
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gencopy(list,source,dest,PF_B,OS_8);
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end;
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end;
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const
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{ load_length + loop dec + cbnz }
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loopoverhead=12;
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{ loop overhead + load + store }
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totallooplen=loopoverhead + 8;
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var
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src, dst: treference;
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tmpreg1,
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totalalign: longint;
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maxlenunrolled: tcgint;
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loadop, storeop: tasmop;
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opsize: tcgsize;
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postfix: toppostfix;
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tmpsource, tmpdest: treference;
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scaledstoreop, unscaledstoreop,
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scaledloadop, unscaledloadop: tasmop;
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regs: array[1..8] of tregister;
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countreg: tregister;
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i : aint;
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lab: tasmlabel;
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*)
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i, regcount: longint;
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hl: tasmlabel;
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simplifysource, simplifydest: boolean;
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begin
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(*
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if len>31 then
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*)
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g_concatcopy_move(list,source,dest,len)
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(*
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if len=0 then
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exit;
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sourcebasereplaced:=false;
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destbasereplaced:=false;
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{ maximum common alignment }
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totalalign:=max(1,newalignment(source.alignment,dest.alignment));
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{ use a simple load/store? }
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if (len in [1,2,4,8]) and
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((totalalign>=(len div 2)) or
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(source.alignment=len) or
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(dest.alignment=len)) then
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begin
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opsize:=int_cgsize(len);
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a_load_ref_ref(list,opsize,opsize,source,dest);
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exit;
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end;
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{ alignment > length is not useful, and would break some checks below }
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while totalalign>len do
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totalalign:=totalalign div 2;
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{ operation sizes to use based on common alignment }
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case totalalign of
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1:
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begin
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postfix:=PF_B;
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opsize:=OS_8;
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end;
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2:
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begin
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postfix:=PF_H;
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opsize:=OS_16;
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end;
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4:
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begin
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postfix:=PF_None;
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opsize:=OS_32;
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end
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else
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begin
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totalalign:=8;
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postfix:=PF_None;
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opsize:=OS_64;
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end;
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end;
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{ maximum length to handled with an unrolled loop (4 loads + 4 stores) }
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maxlenunrolled:=min(totalalign,8)*4;
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{ ldp/stp -> 2 registers per instruction }
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if (totalalign>=4) and
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(len>=totalalign*2) then
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begin
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maxlenunrolled:=maxlenunrolled*2;
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scaledstoreop:=A_STP;
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scaledloadop:=A_LDP;
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unscaledstoreop:=A_NONE;
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unscaledloadop:=A_NONE;
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end
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else
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begin
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reference_reset(src,source.alignment);
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reference_reset(dst,dest.alignment);
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{ load the address of source into src.base }
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src.base:=GetAddressRegister(list);
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a_loadaddr_ref_reg(list,source,src.base);
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{ load the address of dest into dst.base }
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dst.base:=GetAddressRegister(list);
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a_loadaddr_ref_reg(list,dest,dst.base);
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{ generate a loop }
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||||
if len>4 then
|
||||
scaledstoreop:=A_STR;
|
||||
scaledloadop:=A_LDR;
|
||||
unscaledstoreop:=A_STUR;
|
||||
unscaledloadop:=A_LDUR;
|
||||
end;
|
||||
{ we only need 4 instructions extra to call FPC_MOVE }
|
||||
if cs_opt_size in current_settings.optimizerswitches then
|
||||
maxlenunrolled:=maxlenunrolled div 2;
|
||||
if (len>maxlenunrolled) and
|
||||
(len>totalalign*8) then
|
||||
begin
|
||||
g_concatcopy_move(list,source,dest,len);
|
||||
exit;
|
||||
end;
|
||||
|
||||
simplifysource:=true;
|
||||
simplifydest:=true;
|
||||
tmpsource:=source;
|
||||
tmpdest:=dest;
|
||||
{ can we directly encode all offsets in an unrolled loop? }
|
||||
if len<=maxlenunrolled then
|
||||
begin
|
||||
{$ifdef extdebug}
|
||||
list.concat(tai_comment.Create(strpnew('concatcopy unrolled loop; len/opsize/align: '+tostr(len)+'/'+tostr(tcgsize2size[opsize])+'/'+tostr(totalalign))));
|
||||
{$endif extdebug}
|
||||
{ the leftovers will be handled separately -> -(len mod opsize) }
|
||||
inc(tmpsource.offset,len-(len mod tcgsize2size[opsize]));
|
||||
{ additionally, the last regular load/store will be at
|
||||
offset+len-opsize (if len-(len mod opsize)>len) }
|
||||
if tmpsource.offset>source.offset then
|
||||
dec(tmpsource.offset,tcgsize2size[opsize]);
|
||||
getmemop(scaledloadop,unscaledloadop,source,tmpsource,opsize,postfix,loadop,simplifysource);
|
||||
inc(tmpdest.offset,len-(len mod tcgsize2size[opsize]));
|
||||
if tmpdest.offset>dest.offset then
|
||||
dec(tmpdest.offset,tcgsize2size[opsize]);
|
||||
getmemop(scaledstoreop,unscaledstoreop,dest,tmpdest,opsize,postfix,storeop,simplifydest);
|
||||
tmpsource:=source;
|
||||
tmpdest:=dest;
|
||||
{ if we can't directly encode all offsets, simplify }
|
||||
if simplifysource then
|
||||
begin
|
||||
countreg:=GetIntRegister(list,OS_INT);
|
||||
tmpreg1:=GetIntRegister(list,OS_INT);
|
||||
a_load_const_reg(list,OS_INT,len,countreg);
|
||||
current_asmdata.getjumplabel(lab);
|
||||
a_label(list, lab);
|
||||
list.concat(taicpu.op_ref_reg(A_LDUB,src,tmpreg1));
|
||||
list.concat(taicpu.op_reg_ref(A_STB,tmpreg1,dst));
|
||||
list.concat(taicpu.op_reg_const_reg(A_ADD,src.base,1,src.base));
|
||||
list.concat(taicpu.op_reg_const_reg(A_ADD,dst.base,1,dst.base));
|
||||
list.concat(taicpu.op_reg_const_reg(A_SUBcc,countreg,1,countreg));
|
||||
a_jmp_cond(list,OC_NE,lab);
|
||||
loadop:=scaledloadop;
|
||||
makesimpleforcopy(list,loadop,opsize,postfix,false,tmpsource,sourcebasereplaced);
|
||||
end;
|
||||
if simplifydest then
|
||||
begin
|
||||
storeop:=scaledstoreop;
|
||||
makesimpleforcopy(list,storeop,opsize,postfix,false,tmpdest,destbasereplaced);
|
||||
end;
|
||||
regcount:=len div tcgsize2size[opsize];
|
||||
{ in case we transfer two registers at a time, we copy an even
|
||||
number of registers }
|
||||
if loadop=A_LDP then
|
||||
regcount:=regcount and not(1);
|
||||
{ max 4 loads/stores -> max 8 registers (in case of ldp/stdp) }
|
||||
for i:=1 to regcount do
|
||||
regs[i]:=getintregister(list,opsize);
|
||||
if loadop=A_LDP then
|
||||
begin
|
||||
{ load registers }
|
||||
for i:=1 to (regcount div 2) do
|
||||
gendualloadstore(list,loadop,regs[i*2-1],regs[i*2],tmpsource,postfix,opsize);
|
||||
{ store registers }
|
||||
for i:=1 to (regcount div 2) do
|
||||
gendualloadstore(list,storeop,regs[i*2-1],regs[i*2],tmpdest,postfix,opsize);
|
||||
end
|
||||
else
|
||||
begin
|
||||
{ unrolled loop }
|
||||
tmpreg1:=GetIntRegister(list,OS_INT);
|
||||
for i:=1 to len do
|
||||
begin
|
||||
list.concat(taicpu.op_ref_reg(A_LDUB,src,tmpreg1));
|
||||
list.concat(taicpu.op_reg_ref(A_STB,tmpreg1,dst));
|
||||
inc(src.offset);
|
||||
inc(dst.offset);
|
||||
end;
|
||||
for i:=1 to regcount do
|
||||
genloadstore(list,loadop,regs[i],tmpsource,postfix,opsize);
|
||||
for i:=1 to regcount do
|
||||
genloadstore(list,storeop,regs[i],tmpdest,postfix,opsize);
|
||||
end;
|
||||
{ leftover }
|
||||
len:=len-regcount*tcgsize2size[opsize];
|
||||
{$ifdef extdebug}
|
||||
list.concat(tai_comment.Create(strpnew('concatcopy unrolled loop leftover: '+tostr(len))));
|
||||
{$endif extdebug}
|
||||
end
|
||||
else
|
||||
begin
|
||||
{$ifdef extdebug}
|
||||
list.concat(tai_comment.Create(strpnew('concatcopy regular loop; len/align: '+tostr(len)+'/'+tostr(totalalign))));
|
||||
{$endif extdebug}
|
||||
{ regular loop -> definitely use post-indexing }
|
||||
loadop:=scaledloadop;
|
||||
makesimpleforcopy(list,loadop,opsize,postfix,true,tmpsource,sourcebasereplaced);
|
||||
storeop:=scaledstoreop;
|
||||
makesimpleforcopy(list,storeop,opsize,postfix,true,tmpdest,destbasereplaced);
|
||||
current_asmdata.getjumplabel(hl);
|
||||
countreg:=getintregister(list,OS_32);
|
||||
if loadop=A_LDP then
|
||||
a_load_const_reg(list,OS_32,len div tcgsize2size[opsize]*2,countreg)
|
||||
else
|
||||
a_load_const_reg(list,OS_32,len div tcgsize2size[opsize],countreg);
|
||||
a_label(list,hl);
|
||||
a_op_const_reg(list,OP_SUB,OS_32,1,countreg);
|
||||
if loadop=A_LDP then
|
||||
begin
|
||||
regs[1]:=getintregister(list,opsize);
|
||||
regs[2]:=getintregister(list,opsize);
|
||||
gendualloadstore(list,loadop,regs[1],regs[2],tmpsource,postfix,opsize);
|
||||
gendualloadstore(list,storeop,regs[1],regs[2],tmpdest,postfix,opsize);
|
||||
end
|
||||
else
|
||||
begin
|
||||
regs[1]:=getintregister(list,opsize);
|
||||
genloadstore(list,loadop,regs[1],tmpsource,postfix,opsize);
|
||||
genloadstore(list,storeop,regs[1],tmpdest,postfix,opsize);
|
||||
end;
|
||||
list.concat(taicpu.op_reg_sym_ofs(A_CBNZ,countreg,hl,0));
|
||||
len:=len mod tcgsize2size[opsize];
|
||||
end;
|
||||
*)
|
||||
gencopyleftovers(list,tmpsource,tmpdest,len);
|
||||
end;
|
||||
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user