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+ support for lpc1768 by David Welch

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git-svn-id: trunk@18927 -
This commit is contained in:
florian 2011-08-31 20:17:23 +00:00
parent d6726a6ade
commit 0781ac1f82
6 changed files with 206 additions and 12 deletions
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1
.gitattributes vendored
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@ -7012,6 +7012,7 @@ rtl/embedded/Makefile.fpc svneol=native#text/plain
rtl/embedded/arm/at91sam7x256.pp svneol=native#text/plain
rtl/embedded/arm/lm3fury.pp svneol=native#text/pascal
rtl/embedded/arm/lm3tempest.pp svneol=native#text/pascal
rtl/embedded/arm/lpc1768.pp svneol=native#text/pascal
rtl/embedded/arm/lpc21x4.pp svneol=native#text/plain
rtl/embedded/arm/stm32f103.pp svneol=native#text/plain
rtl/embedded/avr/atmega128.pp svneol=native#text/plain

11
compiler/arm/cpuinfo.pas
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@ -65,6 +65,7 @@ Type
ct_lpc2114,
ct_lpc2124,
ct_lpc2194,
ct_lpc1768,
{ ATMEL }
ct_at91sam7s256,
@ -242,6 +243,16 @@ Const
sramsize:$00004000
),
(
controllertypestr:'LPC1768';
controllerunitstr:'LPC1768';
interruptvectors:12;
flashbase:$00000000;
flashsize:$00040000;
srambase:$10000000;
sramsize:$00008000
),
(
controllertypestr:'AT91SAM7S256';
controllerunitstr:'AT91SAM7x256';

33
compiler/systems/t_embed.pas
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@ -224,6 +224,7 @@ begin
ct_lpc2114,
ct_lpc2124,
ct_lpc2194,
ct_lpc1768,
ct_at91sam7s256,
ct_at91sam7se256,
ct_at91sam7x256,
@ -312,17 +313,19 @@ begin
Add('ENTRY(_START)');
Add('MEMORY');
Add('{');
LinkStr := ' flash : ORIGIN = 0x' + IntToHex(flashbase,8)
+ ', LENGTH = ' + IntToStr(flashsize div 1024)+'K';
Add(LinkStr);
if flashsize<>0 then
begin
LinkStr := ' flash : ORIGIN = 0x' + IntToHex(flashbase,8)
+ ', LENGTH = 0x' + IntToHex(flashsize,8);
Add(LinkStr);
end;
LinkStr := ' ram : ORIGIN = 0x' + IntToHex(srambase,8)
+ ', LENGTH = ' + IntToStr(sramsize div 1024)+'K';
+ ', LENGTH = 0x' + IntToHex(sramsize,8);
Add(LinkStr);
Add('}');
Add('_stack_top = 0x' + IntToHex(sramsize+srambase-4,8) + ';');
Add('_stack_top = 0x' + IntToHex(sramsize+srambase,8) + ';');
end;
end
else
@ -342,14 +345,28 @@ begin
Add(' *(.rodata, .rodata.*)');
Add(' *(.comment)');
Add(' _etext = .;');
Add(' } >flash');
if embedded_controllers[current_settings.controllertype].flashsize<>0 then
begin
Add(' } >flash');
end
else
begin
Add(' } >ram');
end;
Add(' .data :');
Add(' {');
Add(' _data = .;');
Add(' *(.data, .data.*)');
Add(' KEEP (*(.fpc .fpc.n_version .fpc.n_links))');
Add(' _edata = .;');
Add(' } >ram AT >flash');
if embedded_controllers[current_settings.controllertype].flashsize<>0 then
begin
Add(' } >ram AT >flash');
end
else
begin
Add(' } >ram');
end;
Add(' .bss :');
Add(' {');
Add(' _bss_start = .;');

7
rtl/embedded/Makefile
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@ -1,5 +1,5 @@
#
# Don't edit, this file is generated by FPCMake Version 2.0.0 [2011/08/27]
# Don't edit, this file is generated by FPCMake Version 2.0.0 [2011/08/28]
#
default: all
MAKEFILETARGETS=i386-linux i386-go32v2 i386-win32 i386-os2 i386-freebsd i386-beos i386-haiku i386-netbsd i386-solaris i386-qnx i386-netware i386-openbsd i386-wdosx i386-darwin i386-emx i386-watcom i386-netwlibc i386-wince i386-embedded i386-symbian i386-nativent i386-iphonesim m68k-linux m68k-freebsd m68k-netbsd m68k-amiga m68k-atari m68k-openbsd m68k-palmos m68k-embedded powerpc-linux powerpc-netbsd powerpc-amiga powerpc-macos powerpc-darwin powerpc-morphos powerpc-embedded powerpc-wii sparc-linux sparc-netbsd sparc-solaris sparc-embedded x86_64-linux x86_64-freebsd x86_64-solaris x86_64-darwin x86_64-win64 x86_64-embedded arm-linux arm-palmos arm-darwin arm-wince arm-gba arm-nds arm-embedded arm-symbian powerpc64-linux powerpc64-darwin powerpc64-embedded avr-embedded armeb-linux armeb-embedded mipsel-linux
@ -315,11 +315,14 @@ CPU_UNITS=
SYSINIT_UNITS=
ifeq ($(ARCH),arm)
ifeq ($(SUBARCH),armv7m)
CPU_UNITS=lm3fury lm3tempest stm32f103 # thumb2_bare
CPU_UNITS=lm3fury lm3tempest stm32f103 lpc1768 # thumb2_bare
endif
ifeq ($(SUBARCH),armv4t)
CPU_UNITS=lpc21x4 at91sam7x256
endif
ifeq ($(SUBARCH),armv4)
CPU_UNITS=lpc21x4 at91sam7x256
endif
endif
ifeq ($(ARCH),avr)
CPU_UNITS=atmega128

6
rtl/embedded/Makefile.fpc
View File

@ -49,12 +49,14 @@ SYSINIT_UNITS=
ifeq ($(ARCH),arm)
ifeq ($(SUBARCH),armv7m)
CPU_UNITS=lm3fury lm3tempest stm32f103 # thumb2_bare
CPU_UNITS=lm3fury lm3tempest stm32f103 lpc1768 # thumb2_bare
endif
ifeq ($(SUBARCH),armv4t)
CPU_UNITS=lpc21x4 at91sam7x256
endif
ifeq ($(SUBARCH),armv4)
CPU_UNITS=lpc21x4 at91sam7x256
endif
endif
ifeq ($(ARCH),avr)

160
rtl/embedded/arm/lpc1768.pp Normal file
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@ -0,0 +1,160 @@
unit lpc1768;
{$goto on}
{$define lpc1768}
interface
var
STCTRL : DWord absolute $E000E010;
STRELOAD : DWord absolute $E000E014;
STCURR : DWord absolute $E000E018;
FIO1DIR2 : Byte absolute $2009C022;
FIO1SET2 : Byte absolute $2009C03A;
FIO1CLR2 : Byte absolute $2009C03E;
SCS : DWord absolute $400FC1A0;
CLKSRCSEL: DWord absolute $400FC10C;
PLL0FEED : DWord absolute $400FC08C;
PLL0CON : DWord absolute $400FC080;
PLL0CFG : DWord absolute $400FC084;
PLL0STAT : DWord absolute $400FC088;
CCLKCFG : DWord absolute $400FC104;
implementation
var
_data: record end; external name '_data';
_edata: record end; external name '_edata';
_etext: record end; external name '_etext';
_bss_start: record end; external name '_bss_start';
_bss_end: record end; external name '_bss_end';
_stack_top: record end; external name '_stack_top';
procedure PASCALMAIN; external name 'PASCALMAIN';
procedure _FPC_haltproc; assembler; nostackframe; public name '_haltproc';
asm
.Lhalt:
b .Lhalt
end;
procedure _FPC_start; assembler; nostackframe;
label _start;
asm
.init
.balign 16
.long _stack_top // stack top address
.long _start+1 // 1 Reset
.long .LDefaultHandler+1 // 2 NMI
.long .LDefaultHandler+1 // 3 HardFault
.long .LDefaultHandler+1 // 4 MemManage
.long .LDefaultHandler+1 // 5 BusFault
.long .LDefaultHandler+1 // 6 UsageFault
.long .LDefaultHandler+1 // 7 RESERVED
.long .LDefaultHandler+1 // 8 RESERVED
.long .LDefaultHandler+1 // 9 RESERVED
.long .LDefaultHandler+1 // 10 RESERVED
.long .LDefaultHandler+1 // 11 SVCall
.long .LDefaultHandler+1 // 12 Debug Monitor
.long .LDefaultHandler+1 // 13 RESERVED
.long .LDefaultHandler+1 // 14 PendSV
.long .LDefaultHandler+1 // 15 SysTick
.long .LDefaultHandler+1 // 16 External Interrupt(0)
.long .LDefaultHandler+1 // 17 External Interrupt(1)
.long .LDefaultHandler+1 // 18 External Interrupt(2)
.long .LDefaultHandler+1 // 19 ...
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.long .LDefaultHandler+1
.globl _start
.text
_start:
// Copy initialized data to ram
ldr r1,.L_etext
ldr r2,.L_data
ldr r3,.L_edata
.Lcopyloop:
cmp r2,r3
ittt ls
ldrls r0,[r1],#4
strls r0,[r2],#4
bls .Lcopyloop
// clear onboard ram
ldr r1,.L_bss_start
ldr r2,.L_bss_end
mov r0,#0
.Lzeroloop:
cmp r1,r2
itt ls
strls r0,[r1],#4
bls .Lzeroloop
b PASCALMAIN
b _FPC_haltproc
.L_bss_start:
.long _bss_start
.L_bss_end:
.long _bss_end
.L_etext:
.long _etext
.L_data:
.long _data
.L_edata:
.long _edata
.LDefaultHandlerAddr:
.long .LDefaultHandler
// default irq handler just returns
.LDefaultHandler:
mov pc,r14
end;
end.