+ RiscV: handle ror(i)(w) in the assembler optimizer

2025-04-05 04:18:31 +02:00 · 2025-03-24 23:00:38 +01:00 · 2025-03-24 23:00:38 +01:00 · 0785652b55
commit 0785652b55
parent bfc1172844
1 changed files with 4 additions and 0 deletions
--- a/compiler/riscv/aoptcpurv.pas
+++ b/compiler/riscv/aoptcpurv.pas
@ -917,11 +917,15 @@ implementation
              A_SRLW,
              A_SRAW,
              A_ROLW,
+              A_RORW,
+              A_RORIW,
 {$endif riscv64}
              A_SLL,
              A_SRL,
              A_SRA,
              A_ROL,
+              A_ROR,
+              A_RORI,
              A_NEG,
              A_NOT:
                result:=OptPass1OP(p);