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* MovzAnd2Movz* optimization improved
+ MovzAnd2And optimization introduced git-svn-id: trunk@46911 -
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@ -5482,32 +5482,81 @@ unit aoptx86;
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if reg_and_hp1_is_instr and
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if reg_and_hp1_is_instr and
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(taicpu(hp1).opcode = A_AND) and
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(taicpu(hp1).opcode = A_AND) and
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MatchOpType(taicpu(hp1),top_const,top_reg) and
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MatchOpType(taicpu(hp1),top_const,top_reg) and
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(taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
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((taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg)
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{$ifdef x86_64}
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{ check for implicit extension to 64 bit }
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or
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((taicpu(p).opsize in [S_BL,S_WL]) and
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(taicpu(hp1).opsize=S_Q) and
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SuperRegistersEqual(taicpu(p).oper[1]^.reg,taicpu(hp1).oper[1]^.reg)
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)
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{$endif x86_64}
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)
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then
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begin
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begin
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case taicpu(p).opsize Of
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case taicpu(p).opsize Of
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S_BL, S_BW{$ifdef x86_64}, S_BQ{$endif x86_64}:
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S_BL, S_BW{$ifdef x86_64}, S_BQ{$endif x86_64}:
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if (taicpu(hp1).oper[0]^.val = $ff) then
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if (taicpu(hp1).oper[0]^.val = $ff) then
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begin
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begin
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DebugMsg(SPeepholeOptimization + 'var4',p);
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DebugMsg(SPeepholeOptimization + 'MovzAnd2Movz1',p);
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RemoveInstruction(hp1);
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RemoveInstruction(hp1);
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Result:=true;
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exit;
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end;
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end;
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S_WL{$ifdef x86_64}, S_WQ{$endif x86_64}:
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S_WL{$ifdef x86_64}, S_WQ{$endif x86_64}:
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if (taicpu(hp1).oper[0]^.val = $ffff) then
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if (taicpu(hp1).oper[0]^.val = $ffff) then
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begin
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begin
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DebugMsg(SPeepholeOptimization + 'var5',p);
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DebugMsg(SPeepholeOptimization + 'MovzAnd2Movz2',p);
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RemoveInstruction(hp1);
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RemoveInstruction(hp1);
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Result:=true;
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exit;
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end;
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end;
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{$ifdef x86_64}
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{$ifdef x86_64}
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S_LQ:
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S_LQ:
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if (taicpu(hp1).oper[0]^.val = $ffffffff) then
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if (taicpu(hp1).oper[0]^.val = $ffffffff) then
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begin
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begin
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if (cs_asm_source in current_settings.globalswitches) then
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DebugMsg(SPeepholeOptimization + 'MovzAnd2Movz3',p);
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asml.insertbefore(tai_comment.create(strpnew(SPeepholeOptimization + 'var6')),p);
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RemoveInstruction(hp1);
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RemoveInstruction(hp1);
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Result:=true;
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exit;
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end;
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end;
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else
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;
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end;
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{$endif x86_64}
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{$endif x86_64}
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else
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{ we cannot get rid of the and, but can we get rid of the movz ?}
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;
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if SuperRegistersEqual(taicpu(p).oper[0]^.reg,taicpu(p).oper[1]^.reg) then
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begin
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case taicpu(p).opsize Of
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S_BL, S_BW{$ifdef x86_64}, S_BQ{$endif x86_64}:
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if (taicpu(hp1).oper[0]^.val and $ff)=taicpu(hp1).oper[0]^.val then
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begin
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DebugMsg(SPeepholeOptimization + 'MovzAnd2And1',p);
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RemoveCurrentP(p,hp1);
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Result:=true;
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exit;
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end;
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S_WL{$ifdef x86_64}, S_WQ{$endif x86_64}:
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if (taicpu(hp1).oper[0]^.val and $ffff)=taicpu(hp1).oper[0]^.val then
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begin
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DebugMsg(SPeepholeOptimization + 'MovzAnd2And2',p);
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RemoveCurrentP(p,hp1);
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Result:=true;
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exit;
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end;
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{$ifdef x86_64}
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S_LQ:
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if (taicpu(hp1).oper[0]^.val and $ffffffff)=taicpu(hp1).oper[0]^.val then
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begin
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DebugMsg(SPeepholeOptimization + 'MovzAnd2And3',p);
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RemoveCurrentP(p,hp1);
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Result:=true;
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exit;
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end;
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{$endif x86_64}
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else
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;
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end;
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end;
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end;
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end;
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end;
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{ changes some movzx constructs to faster synonyms (all examples
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{ changes some movzx constructs to faster synonyms (all examples
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