diff --git a/.gitattributes b/.gitattributes
index 55dffa78cb..0b5d0d0615 100644
--- a/.gitattributes
+++ b/.gitattributes
@@ -913,6 +913,7 @@ compiler/utils/mkspreg.pp svneol=native#text/plain
 compiler/utils/mkx86inl.pp svneol=native#text/plain
 compiler/utils/mkx86ins.pp svneol=native#text/plain
 compiler/utils/mkx86reg.pp svneol=native#text/plain
+compiler/utils/mkxtensareg.pp svneol=native#text/pascal
 compiler/utils/msg2inc.pp svneol=native#text/plain
 compiler/utils/msgdif.pp svneol=native#text/plain
 compiler/utils/msgused.pl svneol=native#text/plain
@@ -1009,6 +1010,16 @@ compiler/x86_64/x8664nop.inc svneol=native#text/plain
 compiler/x86_64/x8664op.inc svneol=native#text/plain
 compiler/x86_64/x8664pro.inc svneol=native#text/plain
 compiler/x86_64/x8664tab.inc svneol=native#text/plain
+compiler/xtensa/rxtensacon.inc svneol=native#text/plain
+compiler/xtensa/rxtensadwa.inc svneol=native#text/plain
+compiler/xtensa/rxtensanor.inc svneol=native#text/plain
+compiler/xtensa/rxtensanum.inc svneol=native#text/plain
+compiler/xtensa/rxtensarni.inc svneol=native#text/plain
+compiler/xtensa/rxtensasri.inc svneol=native#text/plain
+compiler/xtensa/rxtensasta.inc svneol=native#text/plain
+compiler/xtensa/rxtensastd.inc svneol=native#text/plain
+compiler/xtensa/rxtensasup.inc svneol=native#text/plain
+compiler/xtensa/xtensareg.dat svneol=native#text/plain
 /fpmake.pp svneol=native#text/plain
 /fpmake_add1.inc svneol=native#text/plain
 /fpmake_proc1.inc svneol=native#text/plain
diff --git a/compiler/utils/mkxtensareg.pp b/compiler/utils/mkxtensareg.pp
new file mode 100644
index 0000000000..016a44fb63
--- /dev/null
+++ b/compiler/utils/mkxtensareg.pp
@@ -0,0 +1,276 @@
+{
+    Copyright (c) 1998-2002 by Peter Vreman and Florian Klaempfl
+
+    Convert xtensareg.dat to several .inc files for usage with
+    the Free pascal compiler
+
+    See the file COPYING.FPC, included in this distribution,
+    for details about the copyright.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+
+ **********************************************************************}
+{$mode objfpc}
+
+program mkxtensareg;
+
+const Version = '1.00';
+      max_regcount = 200;
+
+var s : string;
+    i : longint;
+    line : longint;
+    regcount:byte;
+    regcount_bsstart:byte;
+    names,
+    regtypes,
+    subtypes,
+    supregs,
+    numbers,
+    stdnames,
+    stabs,dwarf : array[0..max_regcount-1] of string[63];
+    regnumber_index,
+    std_regname_index : array[0..max_regcount-1] of byte;
+
+function tostr(l : longint) : string;
+
+begin
+  str(l,tostr);
+end;
+
+function readstr : string;
+
+  begin
+     result:='';
+     while (s[i]<>',') and (i<=length(s)) do
+       begin
+          result:=result+s[i];
+          inc(i);
+       end;
+  end;
+
+
+procedure readcomma;
+  begin
+     if s[i]<>',' then
+       begin
+         writeln('Missing "," at line ',line);
+         writeln('Line: "',s,'"');
+         halt(1);
+       end;
+     inc(i);
+  end;
+
+
+procedure skipspace;
+
+  begin
+     while (s[i] in [' ',#9]) do
+       inc(i);
+  end;
+
+procedure openinc(out f:text;const fn:string);
+begin
+  writeln('creating ',fn);
+  assign(f,fn);
+  rewrite(f);
+  writeln(f,'{ don''t edit, this file is generated from xtensareg.dat }');
+end;
+
+
+procedure closeinc(var f:text);
+begin
+  writeln(f);
+  close(f);
+end;
+
+procedure build_regnum_index;
+
+var h,i,j,p,t:byte;
+
+begin
+  {Build the registernumber2regindex index.
+   Step 1: Fill.}
+  for i:=0 to regcount-1 do
+    regnumber_index[i]:=i;
+  {Step 2: Sort. We use a Shell-Metzner sort.}
+  p:=regcount_bsstart;
+  repeat
+    for h:=0 to regcount-p-1 do
+      begin
+        i:=h;
+        repeat
+          j:=i+p;
+          if numbers[regnumber_index[j]]>=numbers[regnumber_index[i]] then
+            break;
+          t:=regnumber_index[i];
+          regnumber_index[i]:=regnumber_index[j];
+          regnumber_index[j]:=t;
+          if i<p then
+            break;
+          dec(i,p);
+        until false;
+      end;
+    p:=p shr 1;
+  until p=0;
+end;
+
+procedure build_std_regname_index;
+
+var h,i,j,p,t:byte;
+
+begin
+  {Build the registernumber2regindex index.
+   Step 1: Fill.}
+  for i:=0 to regcount-1 do
+    std_regname_index[i]:=i;
+  {Step 2: Sort. We use a Shell-Metzner sort.}
+  p:=regcount_bsstart;
+  repeat
+    for h:=0 to regcount-p-1 do
+      begin
+        i:=h;
+        repeat
+          j:=i+p;
+          if stdnames[std_regname_index[j]]>=stdnames[std_regname_index[i]] then
+            break;
+          t:=std_regname_index[i];
+          std_regname_index[i]:=std_regname_index[j];
+          std_regname_index[j]:=t;
+          if i<p then
+            break;
+          dec(i,p);
+        until false;
+      end;
+    p:=p shr 1;
+  until p=0;
+end;
+
+
+procedure read_spreg_file;
+
+var infile:text;
+
+begin
+   { open dat file }
+   assign(infile,'xtensareg.dat');
+   reset(infile);
+   while not(eof(infile)) do
+     begin
+        { handle comment }
+        readln(infile,s);
+        inc(line);
+        while (s[1]=' ') do
+         delete(s,1,1);
+        if (s='') or (s[1]=';') then
+          continue;
+
+        i:=1;
+        names[regcount]:=readstr;
+        readcomma;
+        regtypes[regcount]:=readstr;
+        readcomma;
+        subtypes[regcount]:=readstr;
+        readcomma;
+        supregs[regcount]:=readstr;
+        readcomma;
+        stdnames[regcount]:=readstr;
+        readcomma;
+        stabs[regcount]:=readstr;
+        readcomma;
+        dwarf[regcount]:=readstr;
+        { Create register number }
+        if supregs[regcount][1]<>'$' then
+          begin
+            writeln('Missing $ before number, at line ',line);
+            writeln('Line: "',s,'"');
+            halt(1);
+          end;
+        numbers[regcount]:=regtypes[regcount]+copy(subtypes[regcount],2,255)+'00'+copy(supregs[regcount],2,255);
+        if i<length(s) then
+          begin
+            writeln('Extra chars at end of line, at line ',line);
+            writeln('Line: "',s,'"');
+            halt(1);
+          end;
+        inc(regcount);
+        if regcount>max_regcount then
+          begin
+            writeln('Error: Too much registers, please increase maxregcount in source');
+            halt(2);
+          end;
+     end;
+   close(infile);
+end;
+
+procedure write_inc_files;
+
+var
+    norfile,stdfile,supfile,
+    numfile,stabfile,dwarffile,confile,
+    rnifile,srifile:text;
+    first:boolean;
+
+begin
+  { create inc files }
+  openinc(confile,'rxtensacon.inc');
+  openinc(supfile,'rxtensasup.inc');
+  openinc(numfile,'rxtensanum.inc');
+  openinc(stdfile,'rxtensastd.inc');
+  openinc(stabfile,'rxtensasta.inc');
+  openinc(dwarffile,'rxtensadwa.inc');
+  openinc(norfile,'rxtensanor.inc');
+  openinc(rnifile,'rxtensarni.inc');
+  openinc(srifile,'rxtensasri.inc');
+  first:=true;
+  for i:=0 to regcount-1 do
+    begin
+      if not first then
+        begin
+          writeln(numfile,',');
+          writeln(stdfile,',');
+          writeln(stabfile,',');
+          writeln(dwarffile,',');
+          writeln(rnifile,',');
+          writeln(srifile,',');
+        end
+      else
+        first:=false;
+      writeln(supfile,'RS_',names[i],' = ',supregs[i],';');
+      writeln(confile,'NR_'+names[i],' = ','tregister(',numbers[i],')',';');
+      write(numfile,'tregister(',numbers[i],')');
+      write(stdfile,'''',stdnames[i],'''');
+      write(stabfile,stabs[i]);
+      write(dwarffile,dwarf[i]);
+      write(rnifile,regnumber_index[i]);
+      write(srifile,std_regname_index[i]);
+    end;
+  write(norfile,regcount);
+  close(confile);
+  close(supfile);
+  closeinc(numfile);
+  closeinc(stdfile);
+  closeinc(stabfile);
+  closeinc(dwarffile);
+  closeinc(norfile);
+  closeinc(rnifile);
+  closeinc(srifile);
+  writeln('Done!');
+  writeln(regcount,' registers processed');
+end;
+
+
+begin
+   writeln('Register Table Converter Version ',Version);
+   line:=0;
+   regcount:=0;
+   read_spreg_file;
+   regcount_bsstart:=1;
+   while 2*regcount_bsstart<regcount do
+     regcount_bsstart:=regcount_bsstart*2;
+   build_regnum_index;
+   build_std_regname_index;
+   write_inc_files;
+end.
diff --git a/compiler/xtensa/rxtensacon.inc b/compiler/xtensa/rxtensacon.inc
new file mode 100644
index 0000000000..3a2ba0ec05
--- /dev/null
+++ b/compiler/xtensa/rxtensacon.inc
@@ -0,0 +1,34 @@
+{ don't edit, this file is generated from xtensareg.dat }
+NR_NO = tregister($00000000);
+NR_A0 = tregister($01000000);
+NR_A1 = tregister($01000001);
+NR_A2 = tregister($01000002);
+NR_A3 = tregister($01000003);
+NR_A4 = tregister($01000004);
+NR_A5 = tregister($01000005);
+NR_A6 = tregister($01000006);
+NR_A7 = tregister($01000007);
+NR_A8 = tregister($01000008);
+NR_A9 = tregister($01000009);
+NR_A10 = tregister($0100000a);
+NR_A11 = tregister($0100000b);
+NR_A12 = tregister($0100000c);
+NR_A13 = tregister($0100000d);
+NR_A14 = tregister($0100000e);
+NR_A15 = tregister($0100000f);
+NR_F0 = tregister($01000000);
+NR_F1 = tregister($01000001);
+NR_F2 = tregister($01000002);
+NR_F3 = tregister($01000003);
+NR_F4 = tregister($01000004);
+NR_F5 = tregister($01000005);
+NR_F6 = tregister($01000006);
+NR_F7 = tregister($01000007);
+NR_F8 = tregister($01000008);
+NR_F9 = tregister($01000009);
+NR_F10 = tregister($0100000f);
+NR_F11 = tregister($0100000b);
+NR_F12 = tregister($0100000c);
+NR_F13 = tregister($0100000d);
+NR_F14 = tregister($0100000e);
+NR_F15 = tregister($0100000f);
diff --git a/compiler/xtensa/rxtensadwa.inc b/compiler/xtensa/rxtensadwa.inc
new file mode 100644
index 0000000000..618d4bb19e
--- /dev/null
+++ b/compiler/xtensa/rxtensadwa.inc
@@ -0,0 +1,34 @@
+{ don't edit, this file is generated from xtensareg.dat }
+-1,
+0,
+1,
+2,
+3,
+4,
+5,
+6,
+7,
+8,
+9,
+10,
+11,
+12,
+13,
+14,
+15,
+0,
+1,
+2,
+3,
+4,
+5,
+6,
+7,
+8,
+9,
+10,
+11,
+12,
+13,
+14,
+15
diff --git a/compiler/xtensa/rxtensanor.inc b/compiler/xtensa/rxtensanor.inc
new file mode 100644
index 0000000000..c7fe732078
--- /dev/null
+++ b/compiler/xtensa/rxtensanor.inc
@@ -0,0 +1,2 @@
+{ don't edit, this file is generated from xtensareg.dat }
+33
diff --git a/compiler/xtensa/rxtensanum.inc b/compiler/xtensa/rxtensanum.inc
new file mode 100644
index 0000000000..08f0af9acc
--- /dev/null
+++ b/compiler/xtensa/rxtensanum.inc
@@ -0,0 +1,34 @@
+{ don't edit, this file is generated from xtensareg.dat }
+tregister($00000000),
+tregister($01000000),
+tregister($01000001),
+tregister($01000002),
+tregister($01000003),
+tregister($01000004),
+tregister($01000005),
+tregister($01000006),
+tregister($01000007),
+tregister($01000008),
+tregister($01000009),
+tregister($0100000a),
+tregister($0100000b),
+tregister($0100000c),
+tregister($0100000d),
+tregister($0100000e),
+tregister($0100000f),
+tregister($01000000),
+tregister($01000001),
+tregister($01000002),
+tregister($01000003),
+tregister($01000004),
+tregister($01000005),
+tregister($01000006),
+tregister($01000007),
+tregister($01000008),
+tregister($01000009),
+tregister($0100000f),
+tregister($0100000b),
+tregister($0100000c),
+tregister($0100000d),
+tregister($0100000e),
+tregister($0100000f)
diff --git a/compiler/xtensa/rxtensarni.inc b/compiler/xtensa/rxtensarni.inc
new file mode 100644
index 0000000000..e721203de0
--- /dev/null
+++ b/compiler/xtensa/rxtensarni.inc
@@ -0,0 +1,34 @@
+{ don't edit, this file is generated from xtensareg.dat }
+0,
+1,
+17,
+2,
+18,
+3,
+19,
+4,
+20,
+5,
+21,
+6,
+22,
+7,
+23,
+8,
+24,
+9,
+25,
+10,
+26,
+11,
+12,
+28,
+13,
+29,
+14,
+30,
+15,
+31,
+16,
+27,
+32
diff --git a/compiler/xtensa/rxtensasri.inc b/compiler/xtensa/rxtensasri.inc
new file mode 100644
index 0000000000..5e429be226
--- /dev/null
+++ b/compiler/xtensa/rxtensasri.inc
@@ -0,0 +1,34 @@
+{ don't edit, this file is generated from xtensareg.dat }
+0,
+1,
+2,
+11,
+12,
+13,
+14,
+15,
+16,
+3,
+4,
+5,
+6,
+7,
+8,
+9,
+10,
+17,
+18,
+27,
+28,
+29,
+30,
+31,
+32,
+19,
+20,
+21,
+22,
+23,
+24,
+25,
+26
diff --git a/compiler/xtensa/rxtensasta.inc b/compiler/xtensa/rxtensasta.inc
new file mode 100644
index 0000000000..618d4bb19e
--- /dev/null
+++ b/compiler/xtensa/rxtensasta.inc
@@ -0,0 +1,34 @@
+{ don't edit, this file is generated from xtensareg.dat }
+-1,
+0,
+1,
+2,
+3,
+4,
+5,
+6,
+7,
+8,
+9,
+10,
+11,
+12,
+13,
+14,
+15,
+0,
+1,
+2,
+3,
+4,
+5,
+6,
+7,
+8,
+9,
+10,
+11,
+12,
+13,
+14,
+15
diff --git a/compiler/xtensa/rxtensastd.inc b/compiler/xtensa/rxtensastd.inc
new file mode 100644
index 0000000000..4571764678
--- /dev/null
+++ b/compiler/xtensa/rxtensastd.inc
@@ -0,0 +1,34 @@
+{ don't edit, this file is generated from xtensareg.dat }
+'INVALID',
+'a0',
+'a1',
+'a2',
+'a3',
+'a4',
+'a5',
+'a6',
+'a7',
+'a8',
+'a9',
+'a10',
+'a11',
+'a12',
+'a13',
+'a14',
+'a15',
+'f0',
+'f1',
+'f2',
+'f3',
+'f4',
+'f5',
+'f6',
+'f7',
+'f8',
+'f9',
+'f10',
+'f11',
+'f12',
+'f13',
+'f14',
+'f15'
diff --git a/compiler/xtensa/rxtensasup.inc b/compiler/xtensa/rxtensasup.inc
new file mode 100644
index 0000000000..5fbbb75e10
--- /dev/null
+++ b/compiler/xtensa/rxtensasup.inc
@@ -0,0 +1,34 @@
+{ don't edit, this file is generated from xtensareg.dat }
+RS_NO = $00;
+RS_A0 = $00;
+RS_A1 = $01;
+RS_A2 = $02;
+RS_A3 = $03;
+RS_A4 = $04;
+RS_A5 = $05;
+RS_A6 = $06;
+RS_A7 = $07;
+RS_A8 = $08;
+RS_A9 = $09;
+RS_A10 = $0a;
+RS_A11 = $0b;
+RS_A12 = $0c;
+RS_A13 = $0d;
+RS_A14 = $0e;
+RS_A15 = $0f;
+RS_F0 = $00;
+RS_F1 = $01;
+RS_F2 = $02;
+RS_F3 = $03;
+RS_F4 = $04;
+RS_F5 = $05;
+RS_F6 = $06;
+RS_F7 = $07;
+RS_F8 = $08;
+RS_F9 = $09;
+RS_F10 = $0f;
+RS_F11 = $0b;
+RS_F12 = $0c;
+RS_F13 = $0d;
+RS_F14 = $0e;
+RS_F15 = $0f;
diff --git a/compiler/xtensa/xtensareg.dat b/compiler/xtensa/xtensareg.dat
new file mode 100644
index 0000000000..ddd814cf54
--- /dev/null
+++ b/compiler/xtensa/xtensareg.dat
@@ -0,0 +1,45 @@
+;
+; XTensa registers
+;
+; layout
+; <name>,<type>,<subtype>,<value>,<stdname>,<stab idx>,<dwarf idx>
+;
+NO,$00,$00,$00,INVALID,-1,-1
+; Integer registers
+A0,$01,$00,$00,a0,0,0
+A1,$01,$00,$01,a1,1,1
+A2,$01,$00,$02,a2,2,2
+A3,$01,$00,$03,a3,3,3
+A4,$01,$00,$04,a4,4,4
+A5,$01,$00,$05,a5,5,5
+A6,$01,$00,$06,a6,6,6
+A7,$01,$00,$07,a7,7,7
+A8,$01,$00,$08,a8,8,8
+A9,$01,$00,$09,a9,9,9
+A10,$01,$00,$0a,a10,10,10
+A11,$01,$00,$0b,a11,11,11
+A12,$01,$00,$0c,a12,12,12
+A13,$01,$00,$0d,a13,13,13
+A14,$01,$00,$0e,a14,14,14
+A15,$01,$00,$0f,a15,15,15
+
+; Floating point registers
+F0,$01,$00,$00,f0,0,0
+F1,$01,$00,$01,f1,1,1
+F2,$01,$00,$02,f2,2,2
+F3,$01,$00,$03,f3,3,3
+F4,$01,$00,$04,f4,4,4
+F5,$01,$00,$05,f5,5,5
+F6,$01,$00,$06,f6,6,6
+F7,$01,$00,$07,f7,7,7
+F8,$01,$00,$08,f8,8,8
+F9,$01,$00,$09,f9,9,9
+F10,$01,$00,$0f,f10,10,10
+F11,$01,$00,$0b,f11,11,11
+F12,$01,$00,$0c,f12,12,12
+F13,$01,$00,$0d,f13,13,13
+F14,$01,$00,$0e,f14,14,14
+F15,$01,$00,$0f,f15,15,15
+
+
+