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m68k: fix large const loading to address registers

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git-svn-id: trunk@33588 -
This commit is contained in:
Károly Balogh 2016-05-01 10:41:40 +00:00
parent bd54a11f1c
commit 0b7464e4cd
1 changed files with 6 additions and 4 deletions
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10
compiler/m68k/cgcpu.pas
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@ -669,10 +669,12 @@ unit cgcpu;
((longint(a) = -1) or ((longint(a) > 0) and (longint(a) < 8))) then
list.concat(taicpu.op_const_reg(A_MOV3Q,S_L,longint(a),register))
else
{ We don't have to specify the size here, the assembler will decide the size of
the operand it needs. If this ends up as a MOVEA.W, that will sign extend the
value in the dest. reg to full 32 bits (specific to Ax regs only) }
list.concat(taicpu.op_const_reg(A_MOVEA,S_NO,longint(a),register));
{ MOVEA.W will sign extend the value in the dest. reg to full 32 bits
(specific to Ax regs only) }
if isvalue16bit(a) then
list.concat(taicpu.op_const_reg(A_MOVEA,S_W,longint(a),register))
else
list.concat(taicpu.op_const_reg(A_MOVEA,S_L,longint(a),register));
end
else
if a = 0 then