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+ change "mov reg1,reg2;imul x,reg2" to "imul x,reg1,reg2" in popt386
(-dnewoptimizations)
* shl(d) and shr(d) are considered to have a hardcoded register if
they use cl as shift count (since you can't replace them with
another register) in csopt386 (also for -dnewoptimizations)
This commit is contained in:
Jonas Maebe
parent
ba7b10c01d
commit
0cbad4fe45
@ -509,11 +509,14 @@ begin
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{$endif replaceregdebug}
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end;
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function NoHardCodedRegs(p: paicpu): boolean;
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function NoHardCodedRegs(p: paicpu; orgReg, newReg: tRegister): boolean;
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var chCount: byte;
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begin
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case p^.opcode of
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A_IMUL: noHardCodedRegs := p^.ops <> 1;
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A_SHL,A_SHR,A_SHLD,A_SHRD: noHardCodedRegs :=
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(p^.oper[0].typ <> top_reg) or
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((orgReg <> R_ECX) and (newReg <> R_ECX));
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else
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begin
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NoHardCodedRegs := true;
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@ -716,7 +719,7 @@ begin
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Not (PPaiProp(endP^.optInfo)^.canBeRemoved) then
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begin
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sequenceEnd :=
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noHardCodedRegs(paicpu(endP)) and
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noHardCodedRegs(paicpu(endP),orgReg,newReg) and
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RegLoadedWithNewValue(newReg,true,paicpu(endP)) or
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(GetNextInstruction(endp,hp) and
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FindRegDealloc(newReg,hp));
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@ -739,7 +742,7 @@ begin
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(orgRegCanBeModified or not(newRegModified)) and
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(endP^.typ = ait_instruction) and
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not(paicpu(endP)^.is_jmp) and
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NoHardCodedRegs(paicpu(endP)) and
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NoHardCodedRegs(paicpu(endP),orgReg,newReg) and
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RegSizesOk(orgReg,newReg,paicpu(endP)) and
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not RegModifiedByInstruction(orgReg,endP);
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end;
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@ -747,7 +750,7 @@ begin
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sequenceEnd := sequenceEnd and
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(not(assigned(endp)) or
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not(endp^.typ = ait_instruction) or
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(noHardCodedRegs(paicpu(endP)) and
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(noHardCodedRegs(paicpu(endP),orgReg,newReg) and
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RegSizesOk(orgReg,newReg,paicpu(endP)) and
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not(newRegModified and
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(orgReg in PPaiProp(endP^.optInfo)^.usedRegs) and
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@ -1142,31 +1145,33 @@ Begin
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End;
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Procedure RemoveInstructs(AsmL: PAasmOutput; First, Last: Pai);
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{Removes the marked instructions and disposes the PPaiProps of the other
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instructions, restoring their line number}
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{ Removes the marked instructions and disposes the PPaiProps of the other }
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{ instructions }
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Var p, hp1: Pai;
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{$IfDef TP}
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TmpLine: Longint;
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{$EndIf TP}
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InstrCnt: Longint;
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Begin
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begin
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p := First;
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SkipHead(P);
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InstrCnt := 1;
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While (p <> Last) Do
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Begin
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If (p^.typ = ait_marker) and
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(pai_marker(p)^.kind in [noPropInfoStart,noPropInfoEnd]) then
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begin
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hp1 := pai(p^.next);
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asmL^.remove(p);
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dispose(p,done);
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p := hp1
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end
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else
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{$ifndef noinstremove}
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If PPaiProp(p^.OptInfo)^.CanBeRemoved
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Then
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Begin
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if assigned(p^.optInfo) and
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PPaiProp(p^.optInfo)^.canBeRemoved then
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begin
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{$IfDef TP}
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Dispose(PPaiProp(p^.OptInfo));
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{$EndIf}
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GetNextInstruction(p, hp1);
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hp1 := pai(p^.next);
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AsmL^.Remove(p);
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Dispose(p, Done);
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p := hp1;
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Inc(InstrCnt);
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End
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Else
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{$endif noinstremove}
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@ -1175,8 +1180,7 @@ Begin
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Dispose(PPaiProp(p^.OptInfo));
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{$EndIf TP}
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p^.OptInfo := nil;
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GetNextInstruction(p, p);
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Inc(InstrCnt);
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p := pai(p^.next);;
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End;
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End;
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{$IfNDef TP}
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@ -1194,7 +1198,14 @@ End.
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{
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$Log$
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Revision 1.49 2000-02-12 10:54:18 jonas
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Revision 1.50 2000-02-12 14:10:14 jonas
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+ change "mov reg1,reg2;imul x,reg2" to "imul x,reg1,reg2" in popt386
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(-dnewoptimizations)
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* shl(d) and shr(d) are considered to have a hardcoded register if
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they use cl as shift count (since you can't replace them with
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another register) in csopt386 (also for -dnewoptimizations)
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Revision 1.49 2000/02/12 10:54:18 jonas
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* fixed edi allocation in allocRegBetween
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* fixed bug I introduced yesterday, added comment to prevent it from
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happening again in the future
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@ -44,7 +44,7 @@ Uses
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{$ifdef finaldestdebug}
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cobjects,
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{$endif finaldestdebug}
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cpubase,cpuasm,DAOpt386;
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cpubase,cpuasm,DAOpt386,cobjects;
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Function RegUsedAfterInstruction(Reg: TRegister; p: Pai; Var UsedRegs: TRegSet): Boolean;
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Begin
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@ -1738,6 +1738,29 @@ Begin
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A_FSTP,A_FISTP:
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if doFpuLoadStoreOpt(asmL,p) then
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continue;
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{$ifdef foldArithOps}
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A_IMUL:
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begin
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if (paicpu(p)^.oper[1].typ = top_reg) and
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((paicpu(p)^.oper[2].typ = top_none) or
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((paicpu(p)^.oper[2].typ = top_reg) and
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(paicpu(p)^.oper[2].reg = paicpu(p)^.oper[1].reg))) and
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getLastInstruction(p,hp1) and
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(hp1^.typ = ait_instruction) and
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(paicpu(hp1)^.opcode = A_MOV) and
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(paicpu(hp1)^.oper[0].typ = top_reg) and
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(paicpu(hp1)^.oper[1].typ = top_reg) and
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(paicpu(hp1)^.oper[1].reg = paicpu(p)^.oper[1].reg) then
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{ change "mov reg1,reg2; imul y,reg2" to "imul y,reg1,reg2" }
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begin
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paicpu(p)^.ops := 3;
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paicpu(p)^.loadreg(1,paicpu(hp1)^.oper[0].reg);
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paicpu(p)^.loadreg(2,paicpu(hp1)^.oper[1].reg);
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asmL^.remove(hp1);
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dispose(hp1,done);
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end;
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end;
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{$endif foldArithOps}
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A_MOV:
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Begin
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If (Paicpu(p)^.oper[0].typ = top_reg) And
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@ -1865,7 +1888,14 @@ End.
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{
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$Log$
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Revision 1.84 2000-02-09 13:22:58 peter
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Revision 1.85 2000-02-12 14:10:15 jonas
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+ change "mov reg1,reg2;imul x,reg2" to "imul x,reg1,reg2" in popt386
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(-dnewoptimizations)
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* shl(d) and shr(d) are considered to have a hardcoded register if
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they use cl as shift count (since you can't replace them with
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another register) in csopt386 (also for -dnewoptimizations)
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Revision 1.84 2000/02/09 13:22:58 peter
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* log truncated
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Revision 1.83 2000/02/04 13:53:04 jonas
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