* i386: make use of *fence instructions

This commit is contained in:
florian 2022-03-07 23:10:17 +01:00
parent 01ae235676
commit 0d03cad279

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@ -1498,9 +1498,12 @@ end;
procedure ReadBarrier;assembler;nostackframe;
asm
{$ifdef CPUX86_HAS_SSE2}
lfence
{$else CPUX86_HAS_SSE2}
lock
addl $0,0(%esp)
{ alternative: lfence on SSE capable CPUs }
{$endif CPUX86_HAS_SSE2}
end;
procedure ReadDependencyBarrier;{$ifdef SYSTEMINLINE}inline;{$endif}
@ -1510,14 +1513,19 @@ end;
procedure ReadWriteBarrier;assembler;nostackframe;
asm
{$ifdef CPUX86_HAS_SSE2}
mfence
{$else CPUX86_HAS_SSE2}
lock
addl $0,0(%esp)
{ alternative: mfence on SSE capable CPUs }
{$endif CPUX86_HAS_SSE2}
end;
procedure WriteBarrier;assembler;nostackframe;
asm
{ no write reordering on intel CPUs (yet) }
{$ifdef CPUX86_HAS_SSEUNIT}
sfence
{$endif CPUX86_HAS_SSEUNIT}
end;
{$endif}