From 0d57b2d8dacba04e60fe0b728966f87c6b1334e7 Mon Sep 17 00:00:00 2001
From: florian <florian@freepascal.org>
Date: Sun, 27 Dec 2009 20:19:23 +0000
Subject: [PATCH] * use 3 op cgobj methods when doing shl/shr code generation,
 this allows the cg to generate better code on risc archs having 3 operand
 shifts

git-svn-id: trunk@14487 -
---
 compiler/ncgmat.pas | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/compiler/ncgmat.pas b/compiler/ncgmat.pas
index ee4441d7a3..3edad49b36 100644
--- a/compiler/ncgmat.pas
+++ b/compiler/ncgmat.pas
@@ -239,7 +239,7 @@ implementation
         location_copy(location,left.location);
         location_force_reg(current_asmdata.CurrAsmList,location,OS_SINT,false);
         cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,OS_SINT,location.register,location.register);
-        
+
         if (cs_check_overflow in current_settings.localswitches) then
           begin
             current_asmdata.getjumplabel(hl);
@@ -412,12 +412,13 @@ implementation
            shrn: op:=OP_SHR;
          end;
          { load left operators in a register }
-         location_copy(location,left.location);
          if is_signed(left.resultdef) then
            opsize:=OS_SINT
          else
            opsize:=OS_INT;
-         location_force_reg(current_asmdata.CurrAsmList,location,opsize,false);
+         location_force_reg(current_asmdata.CurrAsmList,left.location,opsize,true);
+         location_reset(location,LOC_REGISTER,opsize);
+         location.register:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
 
          { shifting by a constant directly coded: }
          if (right.nodetype=ordconstn) then
@@ -425,8 +426,8 @@ implementation
               { l shl 32 should 0 imho, but neither TP nor Delphi do it in this way (FK)
               if right.value<=31 then
               }
-              cg.a_op_const_reg(current_asmdata.CurrAsmList,op,location.size,
-                tordconstnode(right).value.uvalue and 31,location.register);
+              cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,op,location.size,
+                tordconstnode(right).value.uvalue and 31,left.location.register,location.register);
               {
               else
                 emit_reg_reg(A_XOR,S_L,hregister1,
@@ -446,7 +447,7 @@ implementation
                 end
               else
                 hcountreg:=right.location.register;
-              cg.a_op_reg_reg(current_asmdata.CurrAsmList,op,opsize,hcountreg,location.register);
+              cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,op,opsize,hcountreg,left.location.register,location.register);
            end;
       end;