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* Enhanced the debug output of spilling statistics. Now it includes efficiency of the spilling which is based on

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weight and usage count of registers. Range 0-100%. Such statistics are very handy when you modify the register allocator.
  

git-svn-id: trunk@46196 -
This commit is contained in:
yury 2020-08-03 16:18:32 +00:00
parent eac6675cba
commit 0daba07246
1 changed files with 56 additions and 7 deletions
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61
compiler/rgobj.pas
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@ -293,6 +293,9 @@ unit rgobj;
function get_live_start(reg : tsuperregister) : tai; function get_live_start(reg : tsuperregister) : tai;
procedure set_live_end(reg : tsuperregister;t : tai); procedure set_live_end(reg : tsuperregister;t : tai);
function get_live_end(reg : tsuperregister) : tai; function get_live_end(reg : tsuperregister) : tai;
{$ifdef DEBUG_SPILLCOALESCE}
procedure write_spill_stats;
{$endif DEBUG_SPILLCOALESCE}
public public
{$ifdef EXTDEBUG} {$ifdef EXTDEBUG}
procedure writegraph(loopidx:longint); procedure writegraph(loopidx:longint);
@ -614,7 +617,12 @@ unit rgobj;
insert_regalloc_info_all(list); insert_regalloc_info_all(list);
ibitmap:=tinterferencebitmap.create; ibitmap:=tinterferencebitmap.create;
generate_interference_graph(list,headertai); generate_interference_graph(list,headertai);
{$ifdef DEBUG_SPILLCOALESCE}
if maxreg>first_imaginary then
writeln(current_procinfo.procdef.mangledname, ': register allocation [',regtype,']');
{$endif DEBUG_SPILLCOALESCE}
{$ifdef DEBUG_REGALLOC} {$ifdef DEBUG_REGALLOC}
if maxreg>first_imaginary then
writegraph(rtindex); writegraph(rtindex);
{$endif DEBUG_REGALLOC} {$endif DEBUG_REGALLOC}
inc(rtindex); inc(rtindex);
@ -647,12 +655,7 @@ unit rgobj;
translate_registers(list); translate_registers(list);
{$ifdef DEBUG_SPILLCOALESCE} {$ifdef DEBUG_SPILLCOALESCE}
spillingcounter:=0; write_spill_stats;
for i:=0 to High(spillinfo) do
if spillinfo[i].spilled then
inc(spillingcounter);
if spillingcounter>0 then
writeln(current_procinfo.procdef.mangledname, ': spilled regs: ',spillingcounter);
{$endif DEBUG_SPILLCOALESCE} {$endif DEBUG_SPILLCOALESCE}
{ we need the translation table for debugging info and verbose assembler output, { we need the translation table for debugging info and verbose assembler output,
@ -2803,5 +2806,51 @@ unit rgobj;
add_cpu_interferences(instr); add_cpu_interferences(instr);
end; end;
{$ifdef DEBUG_SPILLCOALESCE}
procedure trgobj.write_spill_stats;
{ This procedure outputs spilling statistincs.
If no spilling has occurred, no output is provided.
NUM is the number of spilled registers.
EFF is efficiency of the spilling which is based on
weight and usage count of registers. Range 0-100%.
0% means all imaginary registers have been spilled.
100% means no imaginary registers have been spilled
(no output in this case).
Higher value is better.
}
var
i,spillingcounter,max_weight:longint;
all_weight,spill_weight,d: double;
begin
max_weight:=1;
for i:=0 to high(spillinfo) do
with reginfo[i] do
if weight>max_weight then
max_weight:=weight;
spillingcounter:=0;
spill_weight:=0;
all_weight:=0;
for i:=0 to high(spillinfo) do
with reginfo[i] do
begin
d:=weight/max_weight*count_uses;
all_weight:=all_weight+d;
if spillinfo[i].spilled then
begin
inc(spillingcounter);
spill_weight:=spill_weight+d;
end;
end;
if spillingcounter>0 then
begin
d:=(1.0-spill_weight/all_weight)*100.0;
writeln(current_procinfo.procdef.mangledname,' [',regtype,']: spill stats: NUM: ',spillingcounter, ', EFF: ',d:4:1,'%');
end;
end;
{$endif DEBUG_SPILLCOALESCE}
end. end.