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riscv32-freertos:

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* unit name fixed
 * linker script fixed
 * assembler supports dwarf
This commit is contained in:
florian 2023-02-09 21:29:06 +01:00
parent 71e0c12c88
commit 0e05e908d5
3 changed files with 5 additions and 94 deletions
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2
compiler/riscv/agrvgas.pas
View File

@ -265,7 +265,7 @@ unit agrvgas;
asmbin : 'as';
asmcmd : '-o $OBJ $EXTRAOPT -march=$ARCH -mabi=$ABI $ASM';
supported_targets : [system_riscv32_linux,system_riscv64_linux];
flags : [af_needar,af_smartlink_sections];
flags : [af_needar,af_smartlink_sections,af_supports_dwarf];
labelprefix : '.L';
labelmaxlen : -1;
comment : '# ';

95
compiler/systems/t_freertos.pas
View File

@ -821,106 +821,17 @@ begin
{$ifdef RISCV32}
with linkres do
begin
Add('OUTPUT_ARCH("riscv")');
Add('ENTRY(_START)');
Add('MEMORY');
with embedded_controllers[current_settings.controllertype] do
begin
Add('{');
Add(' flash (rx) : ORIGIN = 0x'+IntToHex(flashbase,6)+', LENGTH = 0x'+IntToHex(flashsize,6));
Add(' ram (rw!x) : ORIGIN = 0x'+IntToHex(srambase,6)+', LENGTH = 0x'+IntToHex(sramsize,6));
Add('}');
Add('_stack_top = 0x' + IntToHex(srambase+sramsize,4) + ';');
end;
Add('SECTIONS');
Add('{');
Add(' .text :');
Add(' {');
Add(' _text_start = .;');
Add(' KEEP(*(.init .init.*))');
Add(' *(.text .text.*)');
Add(' *(.strings)');
Add(' *(.rodata .rodata.*)');
Add(' *(.comment)');
Add(' . = ALIGN(4);');
Add(' _etext = .;');
if embedded_controllers[current_settings.controllertype].flashsize<>0 then
begin
Add(' } >flash');
//Add(' .note.gnu.build-id : { *(.note.gnu.build-id) } >flash ');
end
else
begin
Add(' } >ram');
//Add(' .note.gnu.build-id : { *(.note.gnu.build-id) } >ram ');
end;
Add(' .data :');
Add(' {');
Add(' _data = .;');
Add(' *(.data .data.*)');
Add(' KEEP (*(.fpc .fpc.n_version .fpc.n_links))');
Add(' _edata = .;');
if embedded_controllers[current_settings.controllertype].flashsize<>0 then
begin
Add(' } >ram AT >flash');
end
else
begin
Add(' } >ram');
end;
Add(' .bss :');
Add(' {');
Add(' _bss_start = .;');
Add(' *(.bss .bss.*)');
Add(' *(COMMON)');
Add(' } >ram');
Add(' . = ALIGN(4);');
Add(' _bss_end = . ;');
Add(' /* Stabs debugging sections. */');
Add(' .stab 0 : { *(.stab) }');
Add(' .stabstr 0 : { *(.stabstr) }');
Add(' .stab.excl 0 : { *(.stab.excl) }');
Add(' .stab.exclstr 0 : { *(.stab.exclstr) }');
Add(' .stab.index 0 : { *(.stab.index) }');
Add(' .stab.indexstr 0 : { *(.stab.indexstr) }');
Add(' .comment 0 : { *(.comment) }');
Add(' /* DWARF debug sections.');
Add(' Symbols in the DWARF debugging sections are relative to the beginning');
Add(' of the section so we begin them at 0. */');
Add(' /* DWARF 1 */');
Add(' .debug 0 : { *(.debug) }');
Add(' .line 0 : { *(.line) }');
Add(' /* GNU DWARF 1 extensions */');
Add(' .debug_srcinfo 0 : { *(.debug_srcinfo) }');
Add(' .debug_sfnames 0 : { *(.debug_sfnames) }');
Add(' /* DWARF 1.1 and DWARF 2 */');
Add(' .debug_aranges 0 : { *(.debug_aranges) }');
Add(' .debug_pubnames 0 : { *(.debug_pubnames) }');
Add(' /* DWARF 2 */');
Add(' .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }');
Add(' .debug_abbrev 0 : { *(.debug_abbrev) }');
Add(' .debug_line 0 : { *(.debug_line) }');
Add(' .debug_frame 0 : { *(.debug_frame) }');
Add(' .debug_str 0 : { *(.debug_str) }');
Add(' .debug_loc 0 : { *(.debug_loc) }');
Add(' .debug_macinfo 0 : { *(.debug_macinfo) }');
Add(' /* SGI/MIPS DWARF 2 extensions */');
Add(' .debug_weaknames 0 : { *(.debug_weaknames) }');
Add(' .debug_funcnames 0 : { *(.debug_funcnames) }');
Add(' .debug_typenames 0 : { *(.debug_typenames) }');
Add(' .debug_varnames 0 : { *(.debug_varnames) }');
Add(' /* DWARF 3 */');
Add(' .debug_pubtypes 0 : { *(.debug_pubtypes) }');
Add(' .debug_ranges 0 : { *(.debug_ranges) }');
Add(' }');
Add('}');
Add('_end = .;');
end;
{$endif RISCV32}
{$endif RISCV32}
{$ifdef XTENSA}
{$ifdef XTENSA}
with linkres do
begin
Add('SECTIONS');

2
rtl/freertos/riscv32/esp32c3.pp
View File

@ -2,7 +2,7 @@
Startup code for riscv32-esp32c3 using idf
******************************************************************************}
unit esp32;
unit esp32c3;
{$goto on}
{$macro on}