- removed 2 unnecessary instructions for 8-bit OP_ROL/OP_ROR in tcgz80.a_op_reg_reg_internal

git-svn-id: branches/z80@44669 -
This commit is contained in:
nickysn 2020-04-09 21:56:45 +00:00
parent eb3c4546ab
commit 0e257a2c9f

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@ -722,6 +722,7 @@ unit cgcpu;
list.concat(taicpu.op_reg(A_INC,NR_B));
list.concat(taicpu.op_reg(A_DEC,NR_B));
a_jmp_flags(list,F_E,l2);
if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
case op of
OP_ROL:
begin