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+ arm: internal abs(<int64>)

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+ arm: overflow checking for abs(...)
This commit is contained in:
florian 2024-03-28 15:56:52 +01:00
parent f0cc07fe68
commit 0efd3afb8c
2 changed files with 29 additions and 10 deletions
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37
compiler/arm/narminl.pas
View File

@ -412,6 +412,7 @@ implementation
procedure tarminlinenode.second_abs_long;
var
opsize : tcgsize;
ovloc: tlocation;
begin
if GenerateThumbCode then
begin
@ -420,18 +421,36 @@ implementation
end;
secondpass(left);
opsize:=def_cgsize(left.resultdef);
hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
location:=left.location;
location.register:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
if is_64bitint(left.resultdef) then
begin
hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
location:=left.location;
location.register64.reglo:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
cg64.a_load64_reg_reg(current_asmdata.CurrAsmList,left.location.register64,location.register64);
cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SAR,OS_32,31,left.location.register64.reghi);
cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_32,left.location.register64.reghi,location.register64.reglo);
cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_32,left.location.register64.reghi,location.register64.reghi);
current_asmdata.CurrAsmList.concat(setoppostfix(taicpu.op_reg_reg_reg(A_SUB,location.register64.reglo,location.register64.reglo,left.location.register64.reghi), PF_S));
current_asmdata.CurrAsmList.concat(setoppostfix(taicpu.op_reg_reg_reg(A_SBC,location.register64.reghi,location.register64.reghi,left.location.register64.reghi), PF_S));
end
else
begin
opsize:=def_cgsize(left.resultdef);
hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
location:=left.location;
location.register:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
current_asmdata.CurrAsmList.concat(setoppostfix(taicpu.op_reg_reg(A_MOV,location.register,left.location.register), PF_S));
cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
current_asmdata.CurrAsmList.concat(setoppostfix(taicpu.op_reg_reg(A_MOV,location.register,left.location.register), PF_S));
if GenerateThumb2Code then
current_asmdata.CurrAsmList.concat(taicpu.op_cond(A_IT,C_MI));
if GenerateThumb2Code then
current_asmdata.CurrAsmList.concat(taicpu.op_cond(A_IT,C_MI));
current_asmdata.CurrAsmList.concat(setcondition(taicpu.op_reg_reg_const(A_RSB,location.register,location.register, 0), C_MI));
current_asmdata.CurrAsmList.concat(setoppostfix(setcondition(taicpu.op_reg_reg_const(A_RSB,location.register,location.register, 0), C_MI),PF_S));
end;
location_reset(ovloc,LOC_VOID,opsize);
cg.g_overflowCheck_loc(current_asmdata.CurrAsmList,ovloc,resultdef,ovloc);
cg.a_reg_dealloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
end;

2
compiler/options.pas
View File

@ -4758,7 +4758,7 @@ procedure read_arguments(cmd:TCmdStr);
{$endif i8086 or avr}
{ abs(long) is handled internally on all CPUs }
def_system_macro('FPC_HAS_INTERNAL_ABS_LONG');
{$if defined(i8086) or defined(i386) or defined(x86_64) or defined(powerpc64) or defined(aarch64)}
{$if defined(i8086) or defined(i386) or defined(x86_64) or defined(powerpc64) or defined(aarch64) or defined(arm)}
def_system_macro('FPC_HAS_INTERNAL_ABS_INT64');
{$endif i8086 or i386 or x86_64 or powerpc64 or aarch64}