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* patch by J. Gareth Moreton: fixes crash on ARM with -CriotR, resolves #38116
git-svn-id: trunk@47531 -
This commit is contained in:
florian
parent
7ad8f94ec4
commit
1014e53081
@ -1284,11 +1284,11 @@ Implementation
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{ All the optimisations from this point on require GetNextInstructionUsingReg
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to return True }
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if not (
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while (
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GetNextInstructionUsingReg(p, hpfar1, taicpu(p).oper[0]^.reg) and
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(hpfar1.typ = ait_instruction)
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) then
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Exit;
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) do
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begin
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{ Change the common
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mov r0, r0, lsr #xxx
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@ -1498,6 +1498,11 @@ Implementation
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exit;
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end;
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{ If hpfar1 is nil after the call to RedundantMovProcess, it is
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because it would have become a dangling pointer, so reinitialise it. }
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if not Assigned(hpfar1) then
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Continue;
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{ Fold the very common sequence
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mov regA, regB
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ldr* regA, [regA]
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@ -1782,6 +1787,9 @@ Implementation
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}
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if RemoveSuperfluousMove(p, hpfar1, 'MovMov2Mov') then
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Result:=true;
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Exit;
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end;
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end;
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@ -40,7 +40,7 @@ Type
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procedure DebugMsg(const s : string; p : tai);
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function RemoveSuperfluousMove(const p: tai; movp: tai; const optimizer: string): boolean;
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function RedundantMovProcess(var p: tai; hp1: tai): boolean;
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function RedundantMovProcess(var p: tai; var hp1: tai): boolean;
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function GetNextInstructionUsingReg(Current: tai; out Next: tai; reg: TRegister): Boolean;
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function OptPass1UXTB(var p: tai): Boolean;
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@ -292,10 +292,10 @@ Implementation
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end;
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function TARMAsmOptimizer.RedundantMovProcess(var p: tai;hp1: tai):boolean;
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function TARMAsmOptimizer.RedundantMovProcess(var p: tai; var hp1: tai):boolean;
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var
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I: Integer;
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current_hp: tai;
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current_hp, next_hp: tai;
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LDRChange: Boolean;
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begin
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Result:=false;
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@ -390,80 +390,80 @@ Implementation
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TransferUsedRegs(TmpUsedRegs);
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{ Search local instruction block }
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while GetNextInstruction(current_hp, hp1) and (hp1 <> BlockEnd) and (hp1.typ = ait_instruction) do
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while GetNextInstruction(current_hp, next_hp) and (next_hp <> BlockEnd) and (next_hp.typ = ait_instruction) do
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begin
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UpdateUsedRegs(TmpUsedRegs, tai(current_hp.Next));
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LDRChange := False;
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if (taicpu(hp1).opcode in [A_LDR,A_STR]) and (taicpu(hp1).ops = 2) then
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if (taicpu(next_hp).opcode in [A_LDR,A_STR]) and (taicpu(next_hp).ops = 2) then
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begin
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{ Change the registers from r1 to r0 }
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if (taicpu(hp1).oper[1]^.ref^.base = taicpu(p).oper[0]^.reg) and
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if (taicpu(next_hp).oper[1]^.ref^.base = taicpu(p).oper[0]^.reg) and
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{$ifdef ARM}
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{ This optimisation conflicts with something and raises
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an access violation - needs further investigation. [Kit] }
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(taicpu(hp1).opcode <> A_LDR) and
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(taicpu(next_hp).opcode <> A_LDR) and
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{$endif ARM}
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{ Don't mess around with the base register if the
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reference is pre- or post-indexed }
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(taicpu(hp1).oper[1]^.ref^.addressmode = AM_OFFSET) then
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(taicpu(next_hp).oper[1]^.ref^.addressmode = AM_OFFSET) then
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begin
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taicpu(hp1).oper[1]^.ref^.base := taicpu(p).oper[1]^.reg;
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taicpu(next_hp).oper[1]^.ref^.base := taicpu(p).oper[1]^.reg;
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LDRChange := True;
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end;
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if taicpu(hp1).oper[1]^.ref^.index = taicpu(p).oper[0]^.reg then
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if taicpu(next_hp).oper[1]^.ref^.index = taicpu(p).oper[0]^.reg then
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begin
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taicpu(hp1).oper[1]^.ref^.index := taicpu(p).oper[1]^.reg;
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taicpu(next_hp).oper[1]^.ref^.index := taicpu(p).oper[1]^.reg;
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LDRChange := True;
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end;
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if LDRChange then
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DebugMsg('Peephole Optimization: ' + std_regname(taicpu(p).oper[0]^.reg) + ' = ' + std_regname(taicpu(p).oper[1]^.reg) + ' (MovLdr2Ldr 1)', hp1);
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DebugMsg('Peephole Optimization: ' + std_regname(taicpu(p).oper[0]^.reg) + ' = ' + std_regname(taicpu(p).oper[1]^.reg) + ' (MovLdr2Ldr 1)', next_hp);
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{ Drop out if we're dealing with pre-indexed references }
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if (taicpu(hp1).oper[1]^.ref^.addressmode = AM_PREINDEXED) and
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if (taicpu(next_hp).oper[1]^.ref^.addressmode = AM_PREINDEXED) and
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(
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RegInRef(taicpu(p).oper[0]^.reg, taicpu(hp1).oper[1]^.ref^) or
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RegInRef(taicpu(p).oper[1]^.reg, taicpu(hp1).oper[1]^.ref^)
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RegInRef(taicpu(p).oper[0]^.reg, taicpu(next_hp).oper[1]^.ref^) or
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RegInRef(taicpu(p).oper[1]^.reg, taicpu(next_hp).oper[1]^.ref^)
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) then
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begin
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{ Remember to update register allocations }
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if LDRChange then
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AllocRegBetween(taicpu(p).oper[1]^.reg, p, hp1, UsedRegs);
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AllocRegBetween(taicpu(p).oper[1]^.reg, p, next_hp, UsedRegs);
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Break;
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end;
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{ The register being stored can be potentially changed (as long as it's not the stack pointer) }
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if (taicpu(hp1).opcode = A_STR) and (getsupreg(taicpu(p).oper[1]^.reg) <> RS_STACK_POINTER_REG) and
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MatchOperand(taicpu(hp1).oper[0]^, taicpu(p).oper[0]^.reg) then
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if (taicpu(next_hp).opcode = A_STR) and (getsupreg(taicpu(p).oper[1]^.reg) <> RS_STACK_POINTER_REG) and
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MatchOperand(taicpu(next_hp).oper[0]^, taicpu(p).oper[0]^.reg) then
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begin
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DebugMsg('Peephole Optimization: ' + std_regname(taicpu(p).oper[0]^.reg) + ' = ' + std_regname(taicpu(p).oper[1]^.reg) + ' (MovLdr2Ldr 2)', hp1);
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taicpu(hp1).oper[0]^.reg := taicpu(p).oper[1]^.reg;
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DebugMsg('Peephole Optimization: ' + std_regname(taicpu(p).oper[0]^.reg) + ' = ' + std_regname(taicpu(p).oper[1]^.reg) + ' (MovLdr2Ldr 2)', next_hp);
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taicpu(next_hp).oper[0]^.reg := taicpu(p).oper[1]^.reg;
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LDRChange := True;
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end;
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if LDRChange and (getsupreg(taicpu(p).oper[1]^.reg) <> RS_STACK_POINTER_REG) then
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begin
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AllocRegBetween(taicpu(p).oper[1]^.reg, p, hp1, UsedRegs);
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AllocRegBetween(taicpu(p).oper[1]^.reg, p, next_hp, UsedRegs);
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if (taicpu(p).oppostfix = PF_None) and
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(
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(
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(taicpu(hp1).opcode = A_LDR) and
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MatchOperand(taicpu(hp1).oper[0]^, taicpu(p).oper[0]^.reg)
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(taicpu(next_hp).opcode = A_LDR) and
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MatchOperand(taicpu(next_hp).oper[0]^, taicpu(p).oper[0]^.reg)
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) or
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not RegUsedAfterInstruction(taicpu(p).oper[0]^.reg, hp1, TmpUsedRegs)
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not RegUsedAfterInstruction(taicpu(p).oper[0]^.reg, next_hp, TmpUsedRegs)
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) and
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{ Double-check to see if the old registers were actually
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changed (e.g. if the super registers matched, but not
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the sizes, they won't be changed). }
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(
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(taicpu(hp1).opcode = A_LDR) or
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not RegInOp(taicpu(p).oper[0]^.reg, taicpu(hp1).oper[0]^)
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(taicpu(next_hp).opcode = A_LDR) or
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not RegInOp(taicpu(p).oper[0]^.reg, taicpu(next_hp).oper[0]^)
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) and
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not RegInRef(taicpu(p).oper[0]^.reg, taicpu(hp1).oper[1]^.ref^) then
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not RegInRef(taicpu(p).oper[0]^.reg, taicpu(next_hp).oper[1]^.ref^) then
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begin
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DebugMsg('Peephole Optimization: RedundantMovProcess 2a done', p);
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RemoveCurrentP(p);
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@ -472,23 +472,28 @@ Implementation
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end;
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end;
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end
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else if (taicpu(hp1).opcode = A_MOV) and (taicpu(hp1).oppostfix = PF_None) and
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(taicpu(hp1).ops = 2) then
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else if (taicpu(next_hp).opcode = A_MOV) and (taicpu(next_hp).oppostfix = PF_None) and
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(taicpu(next_hp).ops = 2) then
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begin
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if MatchOperand(taicpu(hp1).oper[0]^, taicpu(p).oper[0]^.reg) then
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if MatchOperand(taicpu(next_hp).oper[0]^, taicpu(p).oper[0]^.reg) then
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begin
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{ Found another mov that writes entirely to the register }
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if RegUsedBetween(taicpu(p).oper[0]^.reg, p, hp1) then
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if RegUsedBetween(taicpu(p).oper[0]^.reg, p, next_hp) then
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begin
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{ Register was used beforehand }
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if MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[1]^.reg) then
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if MatchOperand(taicpu(next_hp).oper[1]^, taicpu(p).oper[1]^.reg) then
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begin
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{ This MOV is exactly the same as the first one.
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Since none of the registers have changed value
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at this point, we can remove it. }
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DebugMsg('Peephole Optimization: RedundantMovProcess 3a done', hp1);
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asml.Remove(hp1);
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hp1.Free;
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DebugMsg('Peephole Optimization: RedundantMovProcess 3a done', next_hp);
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if (next_hp = hp1) then
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{ Don't let hp1 become a dangling pointer }
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hp1 := nil;
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asml.Remove(next_hp);
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next_hp.Free;
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{ We still have the original p, so we can continue optimising;
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if it was -O2 or below, this instruction appeared immediately
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@ -504,7 +509,7 @@ Implementation
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{ We can delete the first MOV (only if the second MOV is unconditional) }
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{$ifdef ARM}
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if (taicpu(p).oppostfix = PF_None) and
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(taicpu(hp1).condition = C_None) then
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(taicpu(next_hp).condition = C_None) then
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{$endif ARM}
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begin
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DebugMsg('Peephole Optimization: RedundantMovProcess 2b done', p);
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@ -513,9 +518,9 @@ Implementation
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end;
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Exit;
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end
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else if MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) then
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else if MatchOperand(taicpu(next_hp).oper[1]^, taicpu(p).oper[0]^.reg) then
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begin
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if MatchOperand(taicpu(hp1).oper[0]^, taicpu(p).oper[1]^.reg)
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if MatchOperand(taicpu(next_hp).oper[0]^, taicpu(p).oper[1]^.reg)
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{ Be careful - if the entire register is not used, removing this
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instruction will leave the unused part uninitialised }
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{$ifdef AARCH64}
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@ -524,9 +529,14 @@ Implementation
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then
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begin
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{ Instruction will become mov r1,r1 }
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DebugMsg('Peephole Optimization: Mov2None 2 done', hp1);
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asml.Remove(hp1);
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hp1.Free;
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DebugMsg('Peephole Optimization: Mov2None 2 done', next_hp);
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if (next_hp = hp1) then
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{ Don't let hp1 become a dangling pointer }
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hp1 := nil;
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asml.Remove(next_hp);
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next_hp.Free;
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Continue;
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end;
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@ -534,12 +544,12 @@ Implementation
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forces it to be left alone if the full register is not
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used, lest mov w1,w1 gets optimised out by mistake. [Kit] }
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{$ifdef AARCH64}
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if not MatchOperand(taicpu(hp1).oper[0]^, taicpu(p).oper[1]^.reg) then
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if not MatchOperand(taicpu(next_hp).oper[0]^, taicpu(p).oper[1]^.reg) then
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{$endif AARCH64}
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begin
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DebugMsg('Peephole Optimization: ' + std_regname(taicpu(p).oper[0]^.reg) + ' = ' + std_regname(taicpu(p).oper[1]^.reg) + ' (MovMov2Mov 2)', hp1);
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taicpu(hp1).oper[1]^.reg := taicpu(p).oper[1]^.reg;
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AllocRegBetween(taicpu(p).oper[1]^.reg, p, hp1, UsedRegs);
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DebugMsg('Peephole Optimization: ' + std_regname(taicpu(p).oper[0]^.reg) + ' = ' + std_regname(taicpu(p).oper[1]^.reg) + ' (MovMov2Mov 2)', next_hp);
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taicpu(next_hp).oper[1]^.reg := taicpu(p).oper[1]^.reg;
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AllocRegBetween(taicpu(p).oper[1]^.reg, p, next_hp, UsedRegs);
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{ If this was the only reference to the old register,
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then we can remove the original MOV now }
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@ -551,7 +561,7 @@ Implementation
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register). [Kit] }
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(getsupreg(taicpu(p).oper[1]^.reg) <> RS_STACK_POINTER_REG) and
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RegInUsedRegs(taicpu(p).oper[0]^.reg, UsedRegs) and
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not RegUsedAfterInstruction(taicpu(p).oper[0]^.reg, hp1, TmpUsedRegs) then
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not RegUsedAfterInstruction(taicpu(p).oper[0]^.reg, next_hp, TmpUsedRegs) then
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begin
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DebugMsg('Peephole Optimization: RedundantMovProcess 2c done', p);
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RemoveCurrentP(p);
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@ -565,14 +575,14 @@ Implementation
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{ On low optimisation settions, don't search more than one instruction ahead }
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if not(cs_opt_level3 in current_settings.optimizerswitches) or
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{ Stop at procedure calls and jumps }
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is_calljmp(taicpu(hp1).opcode) or
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is_calljmp(taicpu(next_hp).opcode) or
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{ If the read register has changed value, or the MOV
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destination register has been used, drop out }
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RegInInstruction(taicpu(p).oper[0]^.reg, hp1) or
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RegModifiedByInstruction(taicpu(p).oper[1]^.reg, hp1) then
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RegInInstruction(taicpu(p).oper[0]^.reg, next_hp) or
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RegModifiedByInstruction(taicpu(p).oper[1]^.reg, next_hp) then
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Break;
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current_hp := hp1;
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current_hp := next_hp;
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end;
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end;
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end;
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