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* i8086 versions of i386*.inc and r386*.inc renamed to i8086*.inc and r8086*.inc
git-svn-id: branches/i8086@24232 -
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70a0d2989c
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.gitattributes
compiler
46
.gitattributes
vendored
46
.gitattributes
vendored
@ -245,32 +245,32 @@ compiler/i8086/cpupara.pas svneol=native#text/plain
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compiler/i8086/cpupi.pas svneol=native#text/plain
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compiler/i8086/cputarg.pas svneol=native#text/plain
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compiler/i8086/hlcgcpu.pas svneol=native#text/plain
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compiler/i8086/i386att.inc svneol=native#text/plain
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compiler/i8086/i386atts.inc svneol=native#text/plain
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compiler/i8086/i386int.inc svneol=native#text/plain
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compiler/i8086/i386nop.inc svneol=native#text/plain
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compiler/i8086/i386op.inc svneol=native#text/plain
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compiler/i8086/i386prop.inc svneol=native#text/plain
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compiler/i8086/i386tab.inc svneol=native#text/plain
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compiler/i8086/i8086att.inc svneol=native#text/plain
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compiler/i8086/i8086atts.inc svneol=native#text/plain
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compiler/i8086/i8086int.inc svneol=native#text/plain
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compiler/i8086/i8086nop.inc svneol=native#text/plain
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compiler/i8086/i8086op.inc svneol=native#text/plain
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compiler/i8086/i8086prop.inc svneol=native#text/plain
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compiler/i8086/i8086tab.inc svneol=native#text/plain
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compiler/i8086/n8086add.pas svneol=native#text/plain
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compiler/i8086/n8086inl.pas svneol=native#text/plain
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compiler/i8086/n8086mat.pas svneol=native#text/plain
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compiler/i8086/r386ari.inc svneol=native#text/plain
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compiler/i8086/r386att.inc svneol=native#text/plain
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compiler/i8086/r386con.inc svneol=native#text/plain
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compiler/i8086/r386dwrf.inc svneol=native#text/plain
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compiler/i8086/r386int.inc svneol=native#text/plain
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compiler/i8086/r386iri.inc svneol=native#text/plain
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compiler/i8086/r386nasm.inc svneol=native#text/plain
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compiler/i8086/r386nor.inc svneol=native#text/plain
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compiler/i8086/r386nri.inc svneol=native#text/plain
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compiler/i8086/r386num.inc svneol=native#text/plain
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compiler/i8086/r386op.inc svneol=native#text/plain
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compiler/i8086/r386ot.inc svneol=native#text/plain
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compiler/i8086/r386rni.inc svneol=native#text/plain
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compiler/i8086/r386sri.inc svneol=native#text/plain
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compiler/i8086/r386stab.inc svneol=native#text/plain
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compiler/i8086/r386std.inc svneol=native#text/plain
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compiler/i8086/r8086ari.inc svneol=native#text/plain
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compiler/i8086/r8086att.inc svneol=native#text/plain
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compiler/i8086/r8086con.inc svneol=native#text/plain
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compiler/i8086/r8086dwrf.inc svneol=native#text/plain
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compiler/i8086/r8086int.inc svneol=native#text/plain
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compiler/i8086/r8086iri.inc svneol=native#text/plain
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compiler/i8086/r8086nasm.inc svneol=native#text/plain
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compiler/i8086/r8086nor.inc svneol=native#text/plain
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compiler/i8086/r8086nri.inc svneol=native#text/plain
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compiler/i8086/r8086num.inc svneol=native#text/plain
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compiler/i8086/r8086op.inc svneol=native#text/plain
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compiler/i8086/r8086ot.inc svneol=native#text/plain
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compiler/i8086/r8086rni.inc svneol=native#text/plain
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compiler/i8086/r8086sri.inc svneol=native#text/plain
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compiler/i8086/r8086stab.inc svneol=native#text/plain
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compiler/i8086/r8086std.inc svneol=native#text/plain
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compiler/i8086/ra8086att.pas svneol=native#text/plain
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compiler/i8086/ra8086int.pas svneol=native#text/plain
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compiler/i8086/rgcpu.pas svneol=native#text/plain
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@ -47,7 +47,7 @@
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opcode strings should conform to the names as defined by the
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processor manufacturer.
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}
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std_op2str:op2strtable={$i i386int.inc}
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std_op2str:op2strtable={$i i8086int.inc}
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{*****************************************************************************
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GDB Information
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@ -61,7 +61,7 @@
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}
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reg_stab_table : array[tregisterindex] of shortint = (
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{$i r386stab.inc}
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{$i r8086stab.inc}
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);
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@ -45,11 +45,13 @@ uses
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*****************************************************************************}
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type
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{$ifdef x86_64}
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{$if defined(x86_64)}
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TAsmOp={$i x8664op.inc}
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{$else x86_64}
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{$elseif defined(i386)}
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TAsmOp={$i i386op.inc}
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{$endif x86_64}
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{$elseif defined(i8086)}
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TAsmOp={$i i8086op.inc}
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{$endif}
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{ This should define the array of instructions as string }
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op2strtable=array[tasmop] of string[16];
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@ -160,46 +162,56 @@ uses
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{$endif}
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{ Available Registers }
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{$ifdef x86_64}
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{$if defined(x86_64)}
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{$i r8664con.inc}
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{$else x86_64}
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{$elseif defined(i386)}
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{$i r386con.inc}
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{$endif x86_64}
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{$elseif defined(i8086)}
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{$i r8086con.inc}
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{$endif}
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type
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{ Number of registers used for indexing in tables }
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{$ifdef x86_64}
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{$if defined(x86_64)}
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tregisterindex=0..{$i r8664nor.inc}-1;
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{$else x86_64}
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{$elseif defined(i386)}
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tregisterindex=0..{$i r386nor.inc}-1;
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{$endif x86_64}
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{$elseif defined(i8086)}
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tregisterindex=0..{$i r8086nor.inc}-1;
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{$endif}
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const
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{ TODO: Calculate bsstart}
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regnumber_count_bsstart = 64;
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regnumber_table : array[tregisterindex] of tregister = (
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{$ifdef x86_64}
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{$if defined(x86_64)}
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{$i r8664num.inc}
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{$else x86_64}
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{$elseif defined(i386)}
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{$i r386num.inc}
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{$endif x86_64}
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{$elseif defined(i8086)}
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{$i r8086num.inc}
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{$endif}
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);
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regstabs_table : array[tregisterindex] of shortint = (
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{$ifdef x86_64}
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{$if defined(x86_64)}
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{$i r8664stab.inc}
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{$else x86_64}
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{$elseif defined(i386)}
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{$i r386stab.inc}
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{$endif x86_64}
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{$elseif defined(i8086)}
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{$i r8086stab.inc}
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{$endif}
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);
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regdwarf_table : array[tregisterindex] of shortint = (
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{$ifdef x86_64}
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{$if defined(x86_64)}
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{$i r8664dwrf.inc}
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{$else x86_64}
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{$elseif defined(i386)}
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{$i r386dwrf.inc}
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{$endif x86_64}
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{$elseif defined(i8086)}
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{$i r8086dwrf.inc}
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{$endif}
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);
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RS_DEFAULTFLAGS = RS_FLAGS;
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@ -285,7 +297,7 @@ implementation
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rgbase,verbose;
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const
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{$ifdef x86_64}
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{$if defined(x86_64)}
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std_regname_table : TRegNameTable = (
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{$i r8664std.inc}
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);
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@ -296,7 +308,7 @@ implementation
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std_regname_index : array[tregisterindex] of tregisterindex = (
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{$i r8664sri.inc}
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);
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{$else x86_64}
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{$elseif defined(i386)}
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std_regname_table : TRegNameTable = (
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{$i r386std.inc}
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);
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@ -308,7 +320,19 @@ implementation
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std_regname_index : array[tregisterindex] of tregisterindex = (
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{$i r386sri.inc}
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);
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{$endif x86_64}
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{$elseif defined(i8086)}
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std_regname_table : TRegNameTable = (
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{$i r8086std.inc}
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);
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regnumber_index : array[tregisterindex] of tregisterindex = (
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{$i r8086rni.inc}
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);
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std_regname_index : array[tregisterindex] of tregisterindex = (
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{$i r8086sri.inc}
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);
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{$endif}
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{*****************************************************************************
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