mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-08-11 18:25:58 +02:00
* i8086 versions of i386*.inc and r386*.inc renamed to i8086*.inc and r8086*.inc
git-svn-id: branches/i8086@24232 -
This commit is contained in:
parent
70a0d2989c
commit
107a6f6552
46
.gitattributes
vendored
46
.gitattributes
vendored
@ -245,32 +245,32 @@ compiler/i8086/cpupara.pas svneol=native#text/plain
|
|||||||
compiler/i8086/cpupi.pas svneol=native#text/plain
|
compiler/i8086/cpupi.pas svneol=native#text/plain
|
||||||
compiler/i8086/cputarg.pas svneol=native#text/plain
|
compiler/i8086/cputarg.pas svneol=native#text/plain
|
||||||
compiler/i8086/hlcgcpu.pas svneol=native#text/plain
|
compiler/i8086/hlcgcpu.pas svneol=native#text/plain
|
||||||
compiler/i8086/i386att.inc svneol=native#text/plain
|
compiler/i8086/i8086att.inc svneol=native#text/plain
|
||||||
compiler/i8086/i386atts.inc svneol=native#text/plain
|
compiler/i8086/i8086atts.inc svneol=native#text/plain
|
||||||
compiler/i8086/i386int.inc svneol=native#text/plain
|
compiler/i8086/i8086int.inc svneol=native#text/plain
|
||||||
compiler/i8086/i386nop.inc svneol=native#text/plain
|
compiler/i8086/i8086nop.inc svneol=native#text/plain
|
||||||
compiler/i8086/i386op.inc svneol=native#text/plain
|
compiler/i8086/i8086op.inc svneol=native#text/plain
|
||||||
compiler/i8086/i386prop.inc svneol=native#text/plain
|
compiler/i8086/i8086prop.inc svneol=native#text/plain
|
||||||
compiler/i8086/i386tab.inc svneol=native#text/plain
|
compiler/i8086/i8086tab.inc svneol=native#text/plain
|
||||||
compiler/i8086/n8086add.pas svneol=native#text/plain
|
compiler/i8086/n8086add.pas svneol=native#text/plain
|
||||||
compiler/i8086/n8086inl.pas svneol=native#text/plain
|
compiler/i8086/n8086inl.pas svneol=native#text/plain
|
||||||
compiler/i8086/n8086mat.pas svneol=native#text/plain
|
compiler/i8086/n8086mat.pas svneol=native#text/plain
|
||||||
compiler/i8086/r386ari.inc svneol=native#text/plain
|
compiler/i8086/r8086ari.inc svneol=native#text/plain
|
||||||
compiler/i8086/r386att.inc svneol=native#text/plain
|
compiler/i8086/r8086att.inc svneol=native#text/plain
|
||||||
compiler/i8086/r386con.inc svneol=native#text/plain
|
compiler/i8086/r8086con.inc svneol=native#text/plain
|
||||||
compiler/i8086/r386dwrf.inc svneol=native#text/plain
|
compiler/i8086/r8086dwrf.inc svneol=native#text/plain
|
||||||
compiler/i8086/r386int.inc svneol=native#text/plain
|
compiler/i8086/r8086int.inc svneol=native#text/plain
|
||||||
compiler/i8086/r386iri.inc svneol=native#text/plain
|
compiler/i8086/r8086iri.inc svneol=native#text/plain
|
||||||
compiler/i8086/r386nasm.inc svneol=native#text/plain
|
compiler/i8086/r8086nasm.inc svneol=native#text/plain
|
||||||
compiler/i8086/r386nor.inc svneol=native#text/plain
|
compiler/i8086/r8086nor.inc svneol=native#text/plain
|
||||||
compiler/i8086/r386nri.inc svneol=native#text/plain
|
compiler/i8086/r8086nri.inc svneol=native#text/plain
|
||||||
compiler/i8086/r386num.inc svneol=native#text/plain
|
compiler/i8086/r8086num.inc svneol=native#text/plain
|
||||||
compiler/i8086/r386op.inc svneol=native#text/plain
|
compiler/i8086/r8086op.inc svneol=native#text/plain
|
||||||
compiler/i8086/r386ot.inc svneol=native#text/plain
|
compiler/i8086/r8086ot.inc svneol=native#text/plain
|
||||||
compiler/i8086/r386rni.inc svneol=native#text/plain
|
compiler/i8086/r8086rni.inc svneol=native#text/plain
|
||||||
compiler/i8086/r386sri.inc svneol=native#text/plain
|
compiler/i8086/r8086sri.inc svneol=native#text/plain
|
||||||
compiler/i8086/r386stab.inc svneol=native#text/plain
|
compiler/i8086/r8086stab.inc svneol=native#text/plain
|
||||||
compiler/i8086/r386std.inc svneol=native#text/plain
|
compiler/i8086/r8086std.inc svneol=native#text/plain
|
||||||
compiler/i8086/ra8086att.pas svneol=native#text/plain
|
compiler/i8086/ra8086att.pas svneol=native#text/plain
|
||||||
compiler/i8086/ra8086int.pas svneol=native#text/plain
|
compiler/i8086/ra8086int.pas svneol=native#text/plain
|
||||||
compiler/i8086/rgcpu.pas svneol=native#text/plain
|
compiler/i8086/rgcpu.pas svneol=native#text/plain
|
||||||
|
@ -47,7 +47,7 @@
|
|||||||
opcode strings should conform to the names as defined by the
|
opcode strings should conform to the names as defined by the
|
||||||
processor manufacturer.
|
processor manufacturer.
|
||||||
}
|
}
|
||||||
std_op2str:op2strtable={$i i386int.inc}
|
std_op2str:op2strtable={$i i8086int.inc}
|
||||||
|
|
||||||
{*****************************************************************************
|
{*****************************************************************************
|
||||||
GDB Information
|
GDB Information
|
||||||
@ -61,7 +61,7 @@
|
|||||||
|
|
||||||
}
|
}
|
||||||
reg_stab_table : array[tregisterindex] of shortint = (
|
reg_stab_table : array[tregisterindex] of shortint = (
|
||||||
{$i r386stab.inc}
|
{$i r8086stab.inc}
|
||||||
);
|
);
|
||||||
|
|
||||||
|
|
||||||
|
@ -45,11 +45,13 @@ uses
|
|||||||
*****************************************************************************}
|
*****************************************************************************}
|
||||||
|
|
||||||
type
|
type
|
||||||
{$ifdef x86_64}
|
{$if defined(x86_64)}
|
||||||
TAsmOp={$i x8664op.inc}
|
TAsmOp={$i x8664op.inc}
|
||||||
{$else x86_64}
|
{$elseif defined(i386)}
|
||||||
TAsmOp={$i i386op.inc}
|
TAsmOp={$i i386op.inc}
|
||||||
{$endif x86_64}
|
{$elseif defined(i8086)}
|
||||||
|
TAsmOp={$i i8086op.inc}
|
||||||
|
{$endif}
|
||||||
|
|
||||||
{ This should define the array of instructions as string }
|
{ This should define the array of instructions as string }
|
||||||
op2strtable=array[tasmop] of string[16];
|
op2strtable=array[tasmop] of string[16];
|
||||||
@ -160,46 +162,56 @@ uses
|
|||||||
{$endif}
|
{$endif}
|
||||||
|
|
||||||
{ Available Registers }
|
{ Available Registers }
|
||||||
{$ifdef x86_64}
|
{$if defined(x86_64)}
|
||||||
{$i r8664con.inc}
|
{$i r8664con.inc}
|
||||||
{$else x86_64}
|
{$elseif defined(i386)}
|
||||||
{$i r386con.inc}
|
{$i r386con.inc}
|
||||||
{$endif x86_64}
|
{$elseif defined(i8086)}
|
||||||
|
{$i r8086con.inc}
|
||||||
|
{$endif}
|
||||||
|
|
||||||
type
|
type
|
||||||
{ Number of registers used for indexing in tables }
|
{ Number of registers used for indexing in tables }
|
||||||
{$ifdef x86_64}
|
{$if defined(x86_64)}
|
||||||
tregisterindex=0..{$i r8664nor.inc}-1;
|
tregisterindex=0..{$i r8664nor.inc}-1;
|
||||||
{$else x86_64}
|
{$elseif defined(i386)}
|
||||||
tregisterindex=0..{$i r386nor.inc}-1;
|
tregisterindex=0..{$i r386nor.inc}-1;
|
||||||
{$endif x86_64}
|
{$elseif defined(i8086)}
|
||||||
|
tregisterindex=0..{$i r8086nor.inc}-1;
|
||||||
|
{$endif}
|
||||||
|
|
||||||
const
|
const
|
||||||
{ TODO: Calculate bsstart}
|
{ TODO: Calculate bsstart}
|
||||||
regnumber_count_bsstart = 64;
|
regnumber_count_bsstart = 64;
|
||||||
|
|
||||||
regnumber_table : array[tregisterindex] of tregister = (
|
regnumber_table : array[tregisterindex] of tregister = (
|
||||||
{$ifdef x86_64}
|
{$if defined(x86_64)}
|
||||||
{$i r8664num.inc}
|
{$i r8664num.inc}
|
||||||
{$else x86_64}
|
{$elseif defined(i386)}
|
||||||
{$i r386num.inc}
|
{$i r386num.inc}
|
||||||
{$endif x86_64}
|
{$elseif defined(i8086)}
|
||||||
|
{$i r8086num.inc}
|
||||||
|
{$endif}
|
||||||
);
|
);
|
||||||
|
|
||||||
regstabs_table : array[tregisterindex] of shortint = (
|
regstabs_table : array[tregisterindex] of shortint = (
|
||||||
{$ifdef x86_64}
|
{$if defined(x86_64)}
|
||||||
{$i r8664stab.inc}
|
{$i r8664stab.inc}
|
||||||
{$else x86_64}
|
{$elseif defined(i386)}
|
||||||
{$i r386stab.inc}
|
{$i r386stab.inc}
|
||||||
{$endif x86_64}
|
{$elseif defined(i8086)}
|
||||||
|
{$i r8086stab.inc}
|
||||||
|
{$endif}
|
||||||
);
|
);
|
||||||
|
|
||||||
regdwarf_table : array[tregisterindex] of shortint = (
|
regdwarf_table : array[tregisterindex] of shortint = (
|
||||||
{$ifdef x86_64}
|
{$if defined(x86_64)}
|
||||||
{$i r8664dwrf.inc}
|
{$i r8664dwrf.inc}
|
||||||
{$else x86_64}
|
{$elseif defined(i386)}
|
||||||
{$i r386dwrf.inc}
|
{$i r386dwrf.inc}
|
||||||
{$endif x86_64}
|
{$elseif defined(i8086)}
|
||||||
|
{$i r8086dwrf.inc}
|
||||||
|
{$endif}
|
||||||
);
|
);
|
||||||
|
|
||||||
RS_DEFAULTFLAGS = RS_FLAGS;
|
RS_DEFAULTFLAGS = RS_FLAGS;
|
||||||
@ -285,7 +297,7 @@ implementation
|
|||||||
rgbase,verbose;
|
rgbase,verbose;
|
||||||
|
|
||||||
const
|
const
|
||||||
{$ifdef x86_64}
|
{$if defined(x86_64)}
|
||||||
std_regname_table : TRegNameTable = (
|
std_regname_table : TRegNameTable = (
|
||||||
{$i r8664std.inc}
|
{$i r8664std.inc}
|
||||||
);
|
);
|
||||||
@ -296,7 +308,7 @@ implementation
|
|||||||
std_regname_index : array[tregisterindex] of tregisterindex = (
|
std_regname_index : array[tregisterindex] of tregisterindex = (
|
||||||
{$i r8664sri.inc}
|
{$i r8664sri.inc}
|
||||||
);
|
);
|
||||||
{$else x86_64}
|
{$elseif defined(i386)}
|
||||||
std_regname_table : TRegNameTable = (
|
std_regname_table : TRegNameTable = (
|
||||||
{$i r386std.inc}
|
{$i r386std.inc}
|
||||||
);
|
);
|
||||||
@ -308,7 +320,19 @@ implementation
|
|||||||
std_regname_index : array[tregisterindex] of tregisterindex = (
|
std_regname_index : array[tregisterindex] of tregisterindex = (
|
||||||
{$i r386sri.inc}
|
{$i r386sri.inc}
|
||||||
);
|
);
|
||||||
{$endif x86_64}
|
{$elseif defined(i8086)}
|
||||||
|
std_regname_table : TRegNameTable = (
|
||||||
|
{$i r8086std.inc}
|
||||||
|
);
|
||||||
|
|
||||||
|
regnumber_index : array[tregisterindex] of tregisterindex = (
|
||||||
|
{$i r8086rni.inc}
|
||||||
|
);
|
||||||
|
|
||||||
|
std_regname_index : array[tregisterindex] of tregisterindex = (
|
||||||
|
{$i r8086sri.inc}
|
||||||
|
);
|
||||||
|
{$endif}
|
||||||
|
|
||||||
|
|
||||||
{*****************************************************************************
|
{*****************************************************************************
|
||||||
|
Loading…
Reference in New Issue
Block a user