From 109612b7e139a226bbac9557721e76a148d5873c Mon Sep 17 00:00:00 2001 From: florian Date: Tue, 4 Jul 2017 20:52:47 +0000 Subject: [PATCH] * correctly load 32 bit values on sparc64 git-svn-id: trunk@36644 - --- compiler/sparcgen/cgsparc.pas | 11 +++++++---- compiler/sparcgen/opcode.inc | 2 +- compiler/sparcgen/strinst.inc | 2 +- 3 files changed, 9 insertions(+), 6 deletions(-) diff --git a/compiler/sparcgen/cgsparc.pas b/compiler/sparcgen/cgsparc.pas index d259a4ff2c..da98051584 100644 --- a/compiler/sparcgen/cgsparc.pas +++ b/compiler/sparcgen/cgsparc.pas @@ -459,15 +459,18 @@ implementation Op:=A_LDSH;{Load Signed Halfword} OS_16: Op:=A_LDUH;{Load Unsigned Halfword} - OS_S32, - OS_32: - Op:=A_LD;{Load Word} {$ifdef SPARC64} + OS_S32: + Op:=A_LDSW;{Load Signed Word} + OS_32: + Op:=A_LDUW;{Load Unsigned Word} OS_64, OS_S64: Op:=A_LDX; {$else SPARC64} - + OS_S32, + OS_32: + Op:=A_LD;{Load Word} OS_S64, OS_64: Op:=A_LDD;{Load a Long Word} diff --git a/compiler/sparcgen/opcode.inc b/compiler/sparcgen/opcode.inc index 9e8cadae72..9bcf5c9a6e 100644 --- a/compiler/sparcgen/opcode.inc +++ b/compiler/sparcgen/opcode.inc @@ -13,7 +13,7 @@ A_CBccc, A_FLUSH, {Load instructions} A_LDSB,A_LDSH,A_LDSTUB, -A_LDUB,A_LDUH,A_LD,A_LDD,A_LDF,A_LDFSR,A_LDDF,A_LDC,A_LDCSR,A_LDDC,A_LDX, +A_LDUB,A_LDUH,A_LD,A_LDD,A_LDF,A_LDFSR,A_LDDF,A_LDC,A_LDCSR,A_LDDC,A_LDX,A_LDUW,A_LDSW, A_LDSBA,A_LDSHA,A_LDUBA,A_LDUHA,A_LDA,A_LDDA, A_LDSTUBA, A_MULScc, diff --git a/compiler/sparcgen/strinst.inc b/compiler/sparcgen/strinst.inc index 2d816b5ab9..3d641a3af6 100644 --- a/compiler/sparcgen/strinst.inc +++ b/compiler/sparcgen/strinst.inc @@ -11,7 +11,7 @@ 'cbccc', 'flush', 'ldsb','ldsh','ldstub', - 'ldub','lduh','ld','ldd','ld','ldfsr','ldd','ldc','ldcsr','lddc','ldx', + 'ldub','lduh','ld','ldd','ld','ldfsr','ldd','ldc','ldcsr','lddc','ldx','lduw','ldsw', 'ldsba','ldsha','lduba','lduha','lda','ldda', 'ldstuba', 'mulscc',