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* fixed LdrLdr2LdrMov optimisation in case the first and second ldr have

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a different size (disable it in that case) + test

git-svn-id: trunk@25778 -
This commit is contained in:
Jonas Maebe 2013-10-14 12:49:34 +00:00
parent 5276159e77
commit 10ae87f11c
3 changed files with 29 additions and 4 deletions
.gitattributes
compiler/arm
aoptcpu.pas
tests/test/opt
tarmls1.pp

1
.gitattributes vendored
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@ -10754,6 +10754,7 @@ tests/test/library/ttdlltest.pp svneol=native#text/plain
tests/test/library/ulib2a.pp svneol=native#text/plain
tests/test/library/ulib2b.pp svneol=native#text/plain
tests/test/opt/README.txt svneol=native#text/plain
tests/test/opt/tarmls1.pp svneol=native#text/plain
tests/test/opt/tarmsa1.pp svneol=native#text/plain
tests/test/opt/tarmshift.pp svneol=native#text/plain
tests/test/opt/tcaseopt1.pp svneol=native#text/plain

9
compiler/arm/aoptcpu.pas
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@ -663,10 +663,11 @@ Implementation
ldr reg1,ref
mov reg2,reg1
}
if RefsEqual(taicpu(p).oper[1]^.ref^,taicpu(hp1).oper[1]^.ref^) and
(taicpu(p).oper[0]^.reg<>taicpu(hp1).oper[1]^.ref^.index) and
(taicpu(p).oper[0]^.reg<>taicpu(hp1).oper[1]^.ref^.base) and
(taicpu(hp1).oper[1]^.ref^.addressmode=AM_OFFSET) then
if (taicpu(p).oppostfix=taicpu(hp1).oppostfix) and
RefsEqual(taicpu(p).oper[1]^.ref^,taicpu(hp1).oper[1]^.ref^) and
(taicpu(p).oper[0]^.reg<>taicpu(hp1).oper[1]^.ref^.index) and
(taicpu(p).oper[0]^.reg<>taicpu(hp1).oper[1]^.ref^.base) and
(taicpu(hp1).oper[1]^.ref^.addressmode=AM_OFFSET) then
begin
if taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg then
begin

23
tests/test/opt/tarmls1.pp Normal file
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@ -0,0 +1,23 @@
{ %opt=-O2 }
type
trec = record
w: longint;
end;
function test(var r: trec): byte;
begin
test:=byte(r.w);
r.w:=r.w shr 8;
end;
var
r: trec;
begin
r.w:=$1234;
if test(r)<>$34 then
halt(1);
if r.w<>$12 then
halt(2);
end.