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* fixed an opsize bug in ti8086addnode.second_add64bit, which caused 32-bit instructions to be emitted

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git-svn-id: trunk@24670 -
This commit is contained in:
nickysn 2013-05-31 17:13:38 +00:00
parent fba73d3c96
commit 10b3ce1ba5
1 changed files with 8 additions and 10 deletions
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18
compiler/i8086/n8086add.pas
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@ -84,7 +84,6 @@ interface
var
op : TOpCG;
op1,op2 : TAsmOp;
opsize : TOpSize;
hregister,
hregister2 : tregister;
hl4 : tasmlabel;
@ -97,7 +96,6 @@ interface
op1:=A_NONE;
op2:=A_NONE;
mboverflow:=false;
opsize:=S_L;
unsigned:=((left.resultdef.typ=orddef) and
(torddef(left.resultdef).ordtype=u64bit)) or
((right.resultdef.typ=orddef) and
@ -174,16 +172,16 @@ interface
begin
r:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
cg64.a_load64low_loc_reg(current_asmdata.CurrAsmList,right.location,r);
emit_reg_reg(op1,opsize,left.location.register64.reglo,r);
emit_reg_reg(op2,opsize,GetNextReg(left.location.register64.reglo),GetNextReg(r));
emit_reg_reg(A_MOV,opsize,r,left.location.register64.reglo);
emit_reg_reg(A_MOV,opsize,GetNextReg(r),GetNextReg(left.location.register64.reglo));
emit_reg_reg(op1,S_W,left.location.register64.reglo,r);
emit_reg_reg(op2,S_W,GetNextReg(left.location.register64.reglo),GetNextReg(r));
emit_reg_reg(A_MOV,S_W,r,left.location.register64.reglo);
emit_reg_reg(A_MOV,S_W,GetNextReg(r),GetNextReg(left.location.register64.reglo));
cg64.a_load64high_loc_reg(current_asmdata.CurrAsmList,right.location,r);
{ the carry flag is still ok }
emit_reg_reg(op2,opsize,left.location.register64.reghi,r);
emit_reg_reg(op2,opsize,GetNextReg(left.location.register64.reghi),GetNextReg(r));
emit_reg_reg(A_MOV,opsize,r,left.location.register64.reghi);
emit_reg_reg(A_MOV,opsize,GetNextReg(r),GetNextReg(left.location.register64.reghi));
emit_reg_reg(op2,S_W,left.location.register64.reghi,r);
emit_reg_reg(op2,S_W,GetNextReg(left.location.register64.reghi),GetNextReg(r));
emit_reg_reg(A_MOV,S_W,r,left.location.register64.reghi);
emit_reg_reg(A_MOV,S_W,GetNextReg(r),GetNextReg(left.location.register64.reghi));
end
else
begin