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* patch by J. Gareth Moreton: EAX -> EDX:EAX sign extension shortcuts, and MOVSX shortcuts for AX register, part 2 of #36551
git-svn-id: trunk@43918 -
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@ -324,6 +324,8 @@ unit aoptcpu;
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end;
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A_TEST, A_OR:
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Result:=PostPeepholeOptTestOr(p);
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A_MOVSX:
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Result:=PostPeepholeOptMOVSX(p);
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else
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;
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end;
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@ -88,6 +88,7 @@ unit aoptx86;
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function PostPeepholeOptMovzx(var p : tai) : Boolean;
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function PostPeepholeOptXor(var p : tai) : Boolean;
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{$endif}
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function PostPeepholeOptMOVSX(var p : tai) : boolean;
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function PostPeepholeOptCmp(var p : tai) : Boolean;
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function PostPeepholeOptTestOr(var p : tai) : Boolean;
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function PostPeepholeOptCall(var p : tai) : Boolean;
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@ -5033,6 +5034,50 @@ unit aoptx86;
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end;
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function TX86AsmOptimizer.PostPeepholeOptMOVSX(var p : tai) : boolean;
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begin
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Result := False;
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if not MatchOpType(taicpu(p), top_reg, top_reg) then
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Exit;
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{ Convert:
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movswl %ax,%eax -> cwtl
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movslq %eax,%rax -> cdqe
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NOTE: Don't convert movswl %al,%ax to cbw, because cbw and cwde
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refer to the same opcode and depends only on the assembler's
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current operand-size attribute. [Kit]
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}
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with taicpu(p) do
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case opsize of
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S_WL:
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if (oper[0]^.reg = NR_AX) and (oper[1]^.reg = NR_EAX) then
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begin
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DebugMsg(SPeepholeOptimization + 'Converted movswl %ax,%eax to cwtl', p);
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opcode := A_CWDE;
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clearop(0);
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clearop(1);
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ops := 0;
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Result := True;
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end;
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{$ifdef x86_64}
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S_LQ:
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if (oper[0]^.reg = NR_EAX) and (oper[1]^.reg = NR_RAX) then
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begin
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DebugMsg(SPeepholeOptimization + 'Converted movslq %eax,%rax to cltq', p);
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opcode := A_CDQE;
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clearop(0);
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clearop(1);
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ops := 0;
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Result := True;
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end;
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{$endif x86_64}
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else
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;
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end;
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end;
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function TX86AsmOptimizer.PostPeepholeOptCmp(var p : tai) : Boolean;
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begin
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Result:=false;
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@ -174,6 +174,8 @@ uses
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case taicpu(p).opcode of
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A_MOV:
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Result:=PostPeepholeOptMov(p);
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A_MOVSX:
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Result:=PostPeepholeOptMOVSX(p);
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A_MOVZX:
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Result:=PostPeepholeOptMovzx(p);
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A_CMP:
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