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New backward MOV optimisation
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@ -4155,8 +4155,8 @@ unit aoptx86;
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movq x(ref),%reg64
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shrq y,%reg64
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To:
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movq x+4(ref),%reg32
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shrq y-32,%reg32 (Remove if y = 32)
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movl x+4(ref),%reg32
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shrl y-32,%reg32 (Remove if y = 32)
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}
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if (taicpu(p).opsize = S_Q) and
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(taicpu(p).oper[0]^.typ = top_ref) and { Second operand will be a register }
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@ -4198,6 +4198,55 @@ unit aoptx86;
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Exit;
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end;
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{$endif x86_64}
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{ Backward optimisation. If we have:
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func. %reg1,%reg2
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mov %reg2,%reg3
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(dealloc %reg2)
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Change to:
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func. %reg1,%reg3 (see comment below for what a valid func. is)
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}
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if MatchOpType(taicpu(p), top_reg, top_reg) then
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begin
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CurrentReg := taicpu(p).oper[0]^.reg;
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ActiveReg := taicpu(p).oper[1]^.reg;
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TransferUsedRegs(TmpUsedRegs);
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if not RegUsedAfterInstruction(CurrentReg, p, TmpUsedRegs) and
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GetLastInstruction(p, hp2) and
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(hp2.typ = ait_instruction) and
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{ Have to make sure it's an instruction that only reads from
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operand 1 and only writes (not reads or modifies) from operand 2;
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in essence, a one-operand pure function such as BSR or POPCNT }
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(taicpu(hp2).ops = 2) and
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(insprop[taicpu(hp2).opcode].Ch * [Ch_Rop1, Ch_Wop2] = [Ch_Rop1, Ch_Wop2]) and
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(taicpu(hp2).oper[1]^.typ = top_reg) and
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(taicpu(hp2).oper[1]^.reg = CurrentReg) then
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begin
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case taicpu(hp2).opcode of
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A_FSTSW, A_FNSTSW,
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A_IN, A_INS, A_OUT, A_OUTS,
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A_CMPS, A_LODS, A_MOVS, A_SCAS, A_STOS,
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{ These routines have explicit operands, but they are restricted in
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what they can be (e.g. IN and OUT can only read from AL, AX or
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EAX. }
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A_CMOVcc:
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{ CMOV is not valid either because then CurrentReg will depend
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on an unknown value if the condition is False and hence is
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not a pure write }
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;
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else
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begin
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DebugMsg(SPeepholeOptimization + 'Removed MOV and changed destination on previous instruction to optimise register usage (FuncMov2Func)', p);
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taicpu(hp2).oper[1]^.reg := ActiveReg;
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AllocRegBetween(ActiveReg, hp2, p, TmpUsedRegs);
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RemoveCurrentp(p, hp1);
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Result := True;
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Exit;
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end;
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end;
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end;
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end;
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end;
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