mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-06-04 20:38:25 +02:00
+ compile z80.inc even without FULL_RTL
+ added extra defines to the system unit without FULL_RTL, so that more things can be compiled - commented out stuff from z80.inc that doesn't compile yet. It will be uncommented as soon as the code generator starts being able to compile it git-svn-id: branches/z80@44968 -
This commit is contained in:
parent
c616c8df32
commit
16b2fd4378
@ -22,10 +22,10 @@ procedure fpc_cpuinit;{$ifdef SYSTEMINLINE}inline;{$endif}
|
||||
|
||||
{$define FPC_SYSTEM_HAS_MOVE}
|
||||
procedure Move(const source;var dest;count:SizeInt);[public, alias: 'FPC_MOVE'];
|
||||
var
|
||||
pdest,psrc,pend : pbyte;
|
||||
{var
|
||||
pdest,psrc,pend : pbyte;}
|
||||
begin
|
||||
if (@dest=@source) or (count<=0) then
|
||||
(* if (@dest=@source) or (count<=0) then
|
||||
exit;
|
||||
if (@dest<@source) or (@source+count<@dest) then
|
||||
begin
|
||||
@ -51,7 +51,7 @@ begin
|
||||
dec(psrc);
|
||||
pdest^:=psrc^;
|
||||
end;
|
||||
end;
|
||||
end;*)
|
||||
end;
|
||||
|
||||
|
||||
@ -175,8 +175,8 @@ function InterlockedCompareExchange(var Target: longint; NewValue: longint; Comp
|
||||
end;
|
||||
|
||||
Result:=Target;
|
||||
if Target=Comperand then
|
||||
Target:=NewValue;
|
||||
// if Target=Comperand then
|
||||
// Target:=NewValue;
|
||||
|
||||
{ release interrupts }
|
||||
asm
|
||||
@ -261,8 +261,8 @@ function InterlockedCompareExchange(var Target: smallint; NewValue: smallint; Co
|
||||
end;
|
||||
|
||||
Result:=Target;
|
||||
if Target=Comperand then
|
||||
Target:=NewValue;
|
||||
// if Target=Comperand then
|
||||
// Target:=NewValue;
|
||||
|
||||
{ release interrupts }
|
||||
asm
|
||||
|
@ -14,6 +14,10 @@ interface
|
||||
Type
|
||||
dword = longword;
|
||||
integer = smallint;
|
||||
sizeint = smallint;
|
||||
sizeuint = word;
|
||||
ptrint = smallint;
|
||||
ptruint = word;
|
||||
|
||||
jmp_buf = packed record
|
||||
f,a,b,c,e,d,l,h,ixlo,ixhi,iylo,iyhi,splo,sphi,pclo,pchi : byte;
|
||||
@ -81,6 +85,8 @@ implementation
|
||||
|
||||
{$ifdef FULL_RTL}
|
||||
{$I system.inc}
|
||||
{$else FULL_RTL}
|
||||
{$I z80.inc}
|
||||
{$endif FULL_RTL}
|
||||
|
||||
var
|
||||
|
Loading…
Reference in New Issue
Block a user