From 16f5863847120e1990e3bcb14948d78a04936df0 Mon Sep 17 00:00:00 2001
From: Nikolay Nikolov <nickysn@gmail.com>
Date: Wed, 25 May 2022 19:22:45 +0300
Subject: [PATCH] + added WebAssembly atomic store intrinsics

---
 compiler/wasm32/nwasminl.pas | 61 +++++++++++++++++++++++++++++++++++-
 rtl/wasm32/cpuh.inc          |  8 +++++
 2 files changed, 68 insertions(+), 1 deletion(-)

diff --git a/compiler/wasm32/nwasminl.pas b/compiler/wasm32/nwasminl.pas
index 0e42cbc609..fd6bca8851 100644
--- a/compiler/wasm32/nwasminl.pas
+++ b/compiler/wasm32/nwasminl.pas
@@ -53,6 +53,7 @@ interface
         procedure second_throw_fpcexception;
         procedure second_atomic_fence;
         procedure second_atomic_load(op: TAsmOp);
+        procedure second_atomic_store(op: TAsmOp);
         procedure second_atomic_rmw_x_y(op: TAsmOp);
         procedure second_atomic_rmw_x_y_z(op: TAsmOp);
       protected
@@ -420,6 +421,32 @@ implementation
         thlcgwasm(hlcg).a_load_stack_loc(current_asmdata.CurrAsmList,resultdef,location);
       end;
 
+    procedure twasminlinenode.second_atomic_store(op: TAsmOp);
+      begin
+        location_reset(location,LOC_VOID,OS_NO);
+
+        secondpass(tcallparanode(tcallparanode(left).right).left);
+        hlcg.location_force_reg(current_asmdata.CurrAsmList,
+          tcallparanode(tcallparanode(left).right).left.location,
+          tcallparanode(tcallparanode(left).right).left.resultdef,
+          tcallparanode(tcallparanode(left).right).left.resultdef,false);
+        thlcgwasm(hlcg).a_load_reg_stack(current_asmdata.CurrAsmList,
+          tcallparanode(tcallparanode(left).right).left.resultdef,
+          tcallparanode(tcallparanode(left).right).left.location.register);
+
+        secondpass(tcallparanode(left).left);
+        hlcg.location_force_reg(current_asmdata.CurrAsmList,
+          tcallparanode(left).left.location,
+          tcallparanode(left).left.resultdef,
+          tcallparanode(left).left.resultdef,false);
+        thlcgwasm(hlcg).a_load_reg_stack(current_asmdata.CurrAsmList,
+          tcallparanode(left).left.resultdef,
+          tcallparanode(left).left.location.register);
+
+        current_asmdata.CurrAsmList.Concat(taicpu.op_const(op,0));
+        thlcgwasm(hlcg).decstack(current_asmdata.CurrAsmList,2);
+      end;
+
 
     procedure twasminlinenode.second_atomic_rmw_x_y(op: TAsmOp);
       begin
@@ -625,6 +652,17 @@ implementation
               CheckParameters(1);
               resultdef:=u64inttype;
             end;
+          in_i32_atomic_store8,
+          in_i32_atomic_store16,
+          in_i32_atomic_store,
+          in_i64_atomic_store8,
+          in_i64_atomic_store16,
+          in_i64_atomic_store32,
+          in_i64_atomic_store:
+            begin
+              CheckParameters(2);
+              resultdef:=voidtype;
+            end;
           else
             Result:=inherited pass_typecheck_cpu;
         end;
@@ -642,7 +680,14 @@ implementation
           in_wasm32_memory_copy,
           in_wasm32_unreachable,
           in_wasm32_throw_fpcexception,
-          in_wasm32_atomic_fence:
+          in_wasm32_atomic_fence,
+          in_i32_atomic_store8,
+          in_i32_atomic_store16,
+          in_i32_atomic_store,
+          in_i64_atomic_store8,
+          in_i64_atomic_store16,
+          in_i64_atomic_store32,
+          in_i64_atomic_store:
             expectloc:=LOC_VOID;
           in_wasm32_i32_atomic_rmw8_add_u,
           in_wasm32_i32_atomic_rmw16_add_u,
@@ -845,6 +890,20 @@ implementation
             second_atomic_load(a_i64_atomic_load32_u);
           in_i64_atomic_load:
             second_atomic_load(a_i64_atomic_load);
+          in_i32_atomic_store8:
+            second_atomic_store(a_i32_atomic_store8);
+          in_i32_atomic_store16:
+            second_atomic_store(a_i32_atomic_store16);
+          in_i32_atomic_store:
+            second_atomic_store(a_i32_atomic_store);
+          in_i64_atomic_store8:
+            second_atomic_store(a_i64_atomic_store8);
+          in_i64_atomic_store16:
+            second_atomic_store(a_i64_atomic_store16);
+          in_i64_atomic_store32:
+            second_atomic_store(a_i64_atomic_store32);
+          in_i64_atomic_store:
+            second_atomic_store(a_i64_atomic_store);
           else
             inherited pass_generate_code_cpu;
         end;
diff --git a/rtl/wasm32/cpuh.inc b/rtl/wasm32/cpuh.inc
index a9f5e9fee4..d3b47a1daa 100644
--- a/rtl/wasm32/cpuh.inc
+++ b/rtl/wasm32/cpuh.inc
@@ -93,3 +93,11 @@ function fpc_wasm32_i64_atomic_load16_u(Address: Pointer): QWord;[internproc:fpc
 function fpc_wasm32_i64_atomic_load32_u(Address: Pointer): QWord;[internproc:fpc_in_i64_atomic_load32_u];
 function fpc_wasm32_i64_atomic_load(Address: Pointer): QWord;[internproc:fpc_in_i64_atomic_load];
 
+procedure fpc_wasm32_i32_atomic_store8(Dest: PByte; x: LongWord);[internproc:fpc_in_i32_atomic_store8];
+procedure fpc_wasm32_i32_atomic_store16(Dest: PWord; x: LongWord);[internproc:fpc_in_i32_atomic_store16];
+procedure fpc_wasm32_i32_atomic_store(Dest: PLongWord; x: LongWord);[internproc:fpc_in_i32_atomic_store];
+procedure fpc_wasm32_i64_atomic_store8(Dest: PByte; x: QWord);[internproc:fpc_in_i64_atomic_store8];
+procedure fpc_wasm32_i64_atomic_store16(Dest: PWord; x: QWord);[internproc:fpc_in_i64_atomic_store16];
+procedure fpc_wasm32_i64_atomic_store32(Dest: PLongWord; x: QWord);[internproc:fpc_in_i64_atomic_store32];
+procedure fpc_wasm32_i64_atomic_store(Dest: PQWord; x: QWord);[internproc:fpc_in_i64_atomic_store];
+