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* improved code generation in a_op_const_reg_internal and a_op_const_reg_reg

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git-svn-id: trunk@30662 -
This commit is contained in:
florian 2015-04-19 12:51:53 +00:00
parent 75f4971084
commit 1969abec77
1 changed files with 11 additions and 1 deletions
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12
compiler/avr/cgcpu.pas
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@ -452,7 +452,7 @@ unit cgcpu;
procedure tcgavr.a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; a: tcgint; src, dst: tregister);
begin
if (op in [OP_MUL,OP_IMUL]) and (size in [OS_16,OS_S16]) and (a in [1,2,4,8]) then
if (op in [OP_MUL,OP_IMUL]) and (size in [OS_16,OS_S16]) and (a in [2,4,8]) then
begin
emit_mov(list,dst,src);
emit_mov(list,GetNextReg(dst),GetNextReg(src));
@ -737,9 +737,19 @@ unit cgcpu;
curvalue : byte;
begin
optimize_op_const(size,op,a);
mask:=$ff;
shift:=0;
case op of
OP_NONE:
begin
{ Opcode is optimized away }
end;
OP_MOVE:
begin
{ Optimized, replaced with a simple load }
a_load_const_reg(list,size,a,reg);
end;
OP_OR:
begin
for i:=1 to tcgsize2size[size] do