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m68k: fix tw40182 test
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88ffc9e228
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19fe377455
@ -624,7 +624,6 @@ implementation
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list:=current_asmdata.CurrAsmList;
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pass_left_right;
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location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
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hlcg.location_force_reg(list,left.location,left.resultdef,left.resultdef,true);
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{ calculate 32-bit terms lo(right)*hi(left) and hi(left)*lo(right) }
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hreg1:=NR_NO;
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@ -632,6 +631,19 @@ implementation
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tmpreg:=NR_NO;
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if (right.location.loc=LOC_CONSTANT) then
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begin
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{ if left has side effects, it could be that this code is called with right.location.value64=0,
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see also #40182 }
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if right.location.value64=0 then
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begin
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location.register64.reglo:=cg.getintregister(list,OS_INT);
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cg.a_load_const_reg(list,OS_INT,0,location.register64.reglo);
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location.register64.reghi:=cg.getintregister(list,OS_INT);
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cg.a_load_const_reg(list,OS_INT,0,location.register64.reghi);
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exit;
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end;
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hlcg.location_force_reg(list,left.location,left.resultdef,left.resultdef,true);
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//list.concat(tai_comment.create(strpnew('second_mul64bit: with const')));
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{ Omit zero terms, if any }
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if hi(right.location.value64)<>0 then
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@ -652,6 +664,7 @@ implementation
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else
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begin
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//list.concat(tai_comment.create(strpnew('second_mul64bit: no const')));
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hlcg.location_force_reg(list,left.location,left.resultdef,left.resultdef,true);
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hlcg.location_force_reg(list,right.location,right.resultdef,right.resultdef,true);
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tmpreg:=right.location.register64.reglo;
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hreg1:=cg.getintregister(list,OS_INT);
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