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https://gitlab.com/freepascal.org/fpc/source.git
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+ typed const int64 and qword
+ unary minus-operator q1:=-q2; + not-operator
This commit is contained in:
florian
parent
8534a40b75
commit
1b4cf9afb5
@ -461,7 +461,46 @@ implementation
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emit_reg_reg(A_MOVQ,S_NO,R_MM7,p^.location.register);
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emit_reg_reg(A_MOVQ,S_NO,R_MM7,p^.location.register);
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end;
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end;
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{$endif}
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{$endif}
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var
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hr : preference;
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begin
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if is_64bitint(p^.left^.resulttype) then
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begin
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secondpass(p^.left);
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clear_location(p^.location);
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p^.location.loc:=LOC_REGISTER;
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case p^.left^.location.loc of
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LOC_REGISTER :
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begin
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p^.location.registerlow:=p^.left^.location.registerlow;
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p^.location.registerhigh:=p^.left^.location.registerhigh;
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end;
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LOC_CREGISTER :
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begin
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p^.location.registerlow:=getregister32;
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p^.location.registerhigh:=getregister32;
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emit_reg_reg(A_MOV,S_L,p^.left^.location.registerlow,p^.location.registerlow);
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emit_reg_reg(A_MOV,S_L,p^.left^.location.registerhigh,p^.location.registerhigh);
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end;
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LOC_REFERENCE,LOC_MEM :
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begin
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del_reference(p^.left^.location.reference);
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p^.location.registerlow:=getregister32;
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p^.location.registerhigh:=getregister32;
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exprasmlist^.concat(new(pai386,op_ref_reg(A_MOV,S_L,
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newreference(p^.left^.location.reference),p^.location.registerlow)));
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hr:=newreference(p^.left^.location.reference);
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inc(hr^.offset,4);
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exprasmlist^.concat(new(pai386,op_ref_reg(A_MOV,S_L,
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hr,p^.location.registerhigh)));
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end;
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end;
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exprasmlist^.concat(new(pai386,op_reg(A_NEG,S_L,p^.location.registerlow)));
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exprasmlist^.concat(new(pai386,op_const_reg(A_ADC,S_L,0,p^.location.registerhigh)));
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exprasmlist^.concat(new(pai386,op_reg(A_NEG,S_L,p^.location.registerhigh)));
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end
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else
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begin
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begin
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secondpass(p^.left);
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secondpass(p^.left);
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p^.location.loc:=LOC_REGISTER;
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p^.location.loc:=LOC_REGISTER;
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@ -531,6 +570,7 @@ implementation
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exprasmlist^.concat(new(pai386,op_none(A_FCHS,S_NO)));
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exprasmlist^.concat(new(pai386,op_none(A_FCHS,S_NO)));
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end;
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end;
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end;
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end;
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end;
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{ Here was a problem... }
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{ Here was a problem... }
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{ Operand to be negated always }
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{ Operand to be negated always }
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{ seems to be converted to signed }
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{ seems to be converted to signed }
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@ -552,6 +592,8 @@ implementation
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var
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var
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hl : plabel;
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hl : plabel;
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opsize : topsize;
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opsize : topsize;
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hr : preference;
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begin
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begin
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if is_boolean(p^.resulttype) then
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if is_boolean(p^.resulttype) then
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begin
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begin
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@ -640,6 +682,44 @@ implementation
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emit_reg_reg(A_PXOR,S_D,R_MM7,p^.location.register);
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emit_reg_reg(A_PXOR,S_D,R_MM7,p^.location.register);
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end
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end
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{$endif SUPPORT_MMX}
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{$endif SUPPORT_MMX}
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else if is_64bitint(p^.left^.resulttype) then
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begin
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secondpass(p^.left);
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clear_location(p^.location);
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p^.location.loc:=LOC_REGISTER;
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case p^.left^.location.loc of
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LOC_REGISTER :
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begin
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p^.location.registerlow:=p^.left^.location.registerlow;
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p^.location.registerhigh:=p^.left^.location.registerhigh;
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exprasmlist^.concat(new(pai386,op_reg(A_NOT,S_L,p^.location.registerlow)));
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exprasmlist^.concat(new(pai386,op_reg(A_NOT,S_L,p^.location.registerhigh)));
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end;
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LOC_CREGISTER :
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begin
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p^.location.registerlow:=getregister32;
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p^.location.registerhigh:=getregister32;
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emit_reg_reg(A_MOV,S_L,p^.left^.location.registerlow,p^.location.registerlow);
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emit_reg_reg(A_MOV,S_L,p^.left^.location.registerhigh,p^.location.registerhigh);
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exprasmlist^.concat(new(pai386,op_reg(A_NOT,S_L,p^.location.registerlow)));
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exprasmlist^.concat(new(pai386,op_reg(A_NOT,S_L,p^.location.registerhigh)));
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end;
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LOC_REFERENCE,LOC_MEM :
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begin
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del_reference(p^.left^.location.reference);
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p^.location.registerlow:=getregister32;
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p^.location.registerhigh:=getregister32;
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exprasmlist^.concat(new(pai386,op_ref_reg(A_MOV,S_L,
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newreference(p^.left^.location.reference),p^.location.registerlow)));
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hr:=newreference(p^.left^.location.reference);
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inc(hr^.offset,4);
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exprasmlist^.concat(new(pai386,op_ref_reg(A_MOV,S_L,
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hr,p^.location.registerhigh)));
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exprasmlist^.concat(new(pai386,op_reg(A_NOT,S_L,p^.location.registerlow)));
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exprasmlist^.concat(new(pai386,op_reg(A_NOT,S_L,p^.location.registerhigh)));
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end;
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end;
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end
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else
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else
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begin
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begin
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secondpass(p^.left);
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secondpass(p^.left);
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@ -674,7 +754,12 @@ implementation
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end.
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end.
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{
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{
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$Log$
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$Log$
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Revision 1.14 1998-12-11 16:10:07 florian
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Revision 1.15 1998-12-11 16:50:22 florian
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+ typed const int64 and qword
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+ unary minus-operator q1:=-q2;
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+ not-operator
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Revision 1.14 1998/12/11 16:10:07 florian
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+ shifting for 64 bit ints added
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+ shifting for 64 bit ints added
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* bug in getexplicitregister32 fixed: usableregs wasn't decremented !!
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* bug in getexplicitregister32 fixed: usableregs wasn't decremented !!
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@ -139,6 +139,18 @@ unit ptconst;
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datasegment^.concat(new(pai_const,init_16bit(p^.value)));
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datasegment^.concat(new(pai_const,init_16bit(p^.value)));
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check_range;
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check_range;
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end;
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end;
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s64bitint,
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u64bit:
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begin
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if not is_constintnode(p) then
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Message(cg_e_illegal_expression)
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else
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begin
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{!!!!! hmmm, we can write yet only consts til 2^32-1 :( (FK) }
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datasegment^.concat(new(pai_const,init_32bit(p^.value)));
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datasegment^.concat(new(pai_const,init_32bit(0)));
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end;
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end;
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end;
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end;
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disposetree(p);
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disposetree(p);
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end;
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end;
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@ -647,7 +659,12 @@ unit ptconst;
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end.
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end.
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{
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{
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$Log$
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$Log$
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Revision 1.31 1998-12-11 00:03:41 peter
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Revision 1.32 1998-12-11 16:50:23 florian
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+ typed const int64 and qword
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+ unary minus-operator q1:=-q2;
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+ not-operator
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Revision 1.31 1998/12/11 00:03:41 peter
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+ globtype,tokens,version unit splitted from globals
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+ globtype,tokens,version unit splitted from globals
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Revision 1.30 1998/11/27 14:34:42 peter
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Revision 1.30 1998/11/27 14:34:42 peter
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@ -227,6 +227,22 @@ implementation
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}
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}
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end
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end
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{$endif SUPPORT_MMX}
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{$endif SUPPORT_MMX}
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else if is_64bitint(p^.left^.resulttype) then
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begin
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firstpass(p^.left);
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p^.registersfpu:=p^.left^.registersfpu;
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{$ifdef SUPPORT_MMX}
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p^.registersmmx:=p^.left^.registersmmx;
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{$endif SUPPORT_MMX}
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p^.registers32:=p^.left^.registers32;
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if codegenerror then
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exit;
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if (p^.left^.location.loc<>LOC_REGISTER) and
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(p^.registers32<2) then
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p^.registers32:=2;
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p^.location.loc:=LOC_REGISTER;
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p^.resulttype:=p^.left^.resulttype;
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end
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else if (p^.left^.resulttype^.deftype=orddef) then
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else if (p^.left^.resulttype^.deftype=orddef) then
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begin
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begin
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p^.left:=gentypeconvnode(p^.left,s32bitdef);
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p^.left:=gentypeconvnode(p^.left,s32bitdef);
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@ -318,6 +334,17 @@ implementation
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end
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end
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else
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else
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{$endif SUPPORT_MMX}
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{$endif SUPPORT_MMX}
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if is_64bitint(p^.left^.resulttype) then
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begin
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p^.registers32:=p^.left^.registers32;
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if (p^.location.loc in [LOC_REFERENCE,LOC_MEM,LOC_CREGISTER]) then
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begin
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p^.location.loc:=LOC_REGISTER;
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if (p^.registers32<2) then
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p^.registers32:=2;
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end;
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end
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else
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begin
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begin
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p^.left:=gentypeconvnode(p^.left,s32bitdef);
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p^.left:=gentypeconvnode(p^.left,s32bitdef);
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firstpass(p^.left);
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firstpass(p^.left);
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@ -342,7 +369,12 @@ implementation
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end.
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end.
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{
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{
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$Log$
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$Log$
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Revision 1.9 1998-12-11 16:10:12 florian
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Revision 1.10 1998-12-11 16:50:24 florian
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+ typed const int64 and qword
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+ unary minus-operator q1:=-q2;
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+ not-operator
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Revision 1.9 1998/12/11 16:10:12 florian
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+ shifting for 64 bit ints added
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+ shifting for 64 bit ints added
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* bug in getexplicitregister32 fixed: usableregs wasn't decremented !!
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* bug in getexplicitregister32 fixed: usableregs wasn't decremented !!
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