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+ typed const int64 and qword

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+ unary minus-operator  q1:=-q2;
  + not-operator
This commit is contained in:
florian 1998-12-11 16:50:22 +00:00
parent 8534a40b75
commit 1b4cf9afb5
3 changed files with 197 additions and 63 deletions
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207
compiler/cg386mat.pas
View File

@ -461,76 +461,116 @@ implementation
emit_reg_reg(A_MOVQ,S_NO,R_MM7,p^.location.register); emit_reg_reg(A_MOVQ,S_NO,R_MM7,p^.location.register);
end; end;
{$endif} {$endif}
var
hr : preference;
begin begin
secondpass(p^.left); if is_64bitint(p^.left^.resulttype) then
p^.location.loc:=LOC_REGISTER; begin
case p^.left^.location.loc of secondpass(p^.left);
LOC_REGISTER: clear_location(p^.location);
begin p^.location.loc:=LOC_REGISTER;
p^.location.register:=p^.left^.location.register; case p^.left^.location.loc of
exprasmlist^.concat(new(pai386,op_reg(A_NEG,S_L,p^.location.register))); LOC_REGISTER :
end; begin
LOC_CREGISTER: p^.location.registerlow:=p^.left^.location.registerlow;
begin p^.location.registerhigh:=p^.left^.location.registerhigh;
p^.location.register:=getregister32; end;
emit_reg_reg(A_MOV,S_L,p^.location.register, LOC_CREGISTER :
p^.location.register); begin
exprasmlist^.concat(new(pai386,op_reg(A_NEG,S_L,p^.location.register))); p^.location.registerlow:=getregister32;
p^.location.registerhigh:=getregister32;
emit_reg_reg(A_MOV,S_L,p^.left^.location.registerlow,p^.location.registerlow);
emit_reg_reg(A_MOV,S_L,p^.left^.location.registerhigh,p^.location.registerhigh);
end;
LOC_REFERENCE,LOC_MEM :
begin
del_reference(p^.left^.location.reference);
p^.location.registerlow:=getregister32;
p^.location.registerhigh:=getregister32;
exprasmlist^.concat(new(pai386,op_ref_reg(A_MOV,S_L,
newreference(p^.left^.location.reference),p^.location.registerlow)));
hr:=newreference(p^.left^.location.reference);
inc(hr^.offset,4);
exprasmlist^.concat(new(pai386,op_ref_reg(A_MOV,S_L,
hr,p^.location.registerhigh)));
end;
end; end;
exprasmlist^.concat(new(pai386,op_reg(A_NEG,S_L,p^.location.registerlow)));
exprasmlist^.concat(new(pai386,op_const_reg(A_ADC,S_L,0,p^.location.registerhigh)));
exprasmlist^.concat(new(pai386,op_reg(A_NEG,S_L,p^.location.registerhigh)));
end
else
begin
secondpass(p^.left);
p^.location.loc:=LOC_REGISTER;
case p^.left^.location.loc of
LOC_REGISTER:
begin
p^.location.register:=p^.left^.location.register;
exprasmlist^.concat(new(pai386,op_reg(A_NEG,S_L,p^.location.register)));
end;
LOC_CREGISTER:
begin
p^.location.register:=getregister32;
emit_reg_reg(A_MOV,S_L,p^.location.register,
p^.location.register);
exprasmlist^.concat(new(pai386,op_reg(A_NEG,S_L,p^.location.register)));
end;
{$ifdef SUPPORT_MMX} {$ifdef SUPPORT_MMX}
LOC_MMXREGISTER: LOC_MMXREGISTER:
begin begin
set_location(p^.location,p^.left^.location); set_location(p^.location,p^.left^.location);
emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7); emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
do_mmx_neg; do_mmx_neg;
end; end;
LOC_CMMXREGISTER: LOC_CMMXREGISTER:
begin begin
p^.location.register:=getregistermmx; p^.location.register:=getregistermmx;
emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7); emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
emit_reg_reg(A_MOVQ,S_NO,p^.left^.location.register, emit_reg_reg(A_MOVQ,S_NO,p^.left^.location.register,
p^.location.register); p^.location.register);
do_mmx_neg; do_mmx_neg;
end; end;
{$endif SUPPORT_MMX} {$endif SUPPORT_MMX}
LOC_REFERENCE,LOC_MEM: LOC_REFERENCE,LOC_MEM:
begin
del_reference(p^.left^.location.reference);
if (p^.left^.resulttype^.deftype=floatdef) and
(pfloatdef(p^.left^.resulttype)^.typ<>f32bit) then
begin begin
p^.location.loc:=LOC_FPU; del_reference(p^.left^.location.reference);
floatload(pfloatdef(p^.left^.resulttype)^.typ, if (p^.left^.resulttype^.deftype=floatdef) and
p^.left^.location.reference); (pfloatdef(p^.left^.resulttype)^.typ<>f32bit) then
exprasmlist^.concat(new(pai386,op_none(A_FCHS,S_NO))); begin
end p^.location.loc:=LOC_FPU;
floatload(pfloatdef(p^.left^.resulttype)^.typ,
p^.left^.location.reference);
exprasmlist^.concat(new(pai386,op_none(A_FCHS,S_NO)));
end
{$ifdef SUPPORT_MMX} {$ifdef SUPPORT_MMX}
else if (cs_mmx in aktlocalswitches) and is_mmx_able_array(p^.left^.resulttype) then else if (cs_mmx in aktlocalswitches) and is_mmx_able_array(p^.left^.resulttype) then
begin begin
p^.location.register:=getregistermmx; p^.location.register:=getregistermmx;
emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7); emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
exprasmlist^.concat(new(pai386,op_ref_reg(A_MOVQ,S_NO, exprasmlist^.concat(new(pai386,op_ref_reg(A_MOVQ,S_NO,
newreference(p^.left^.location.reference), newreference(p^.left^.location.reference),
p^.location.register))); p^.location.register)));
do_mmx_neg; do_mmx_neg;
end end
{$endif SUPPORT_MMX} {$endif SUPPORT_MMX}
else else
begin begin
p^.location.register:=getregister32; p^.location.register:=getregister32;
exprasmlist^.concat(new(pai386,op_ref_reg(A_MOV,S_L, exprasmlist^.concat(new(pai386,op_ref_reg(A_MOV,S_L,
newreference(p^.left^.location.reference), newreference(p^.left^.location.reference),
p^.location.register))); p^.location.register)));
exprasmlist^.concat(new(pai386,op_reg(A_NEG,S_L,p^.location.register))); exprasmlist^.concat(new(pai386,op_reg(A_NEG,S_L,p^.location.register)));
end;
end; end;
end; LOC_FPU:
LOC_FPU: begin
begin p^.location.loc:=LOC_FPU;
p^.location.loc:=LOC_FPU; exprasmlist^.concat(new(pai386,op_none(A_FCHS,S_NO)));
exprasmlist^.concat(new(pai386,op_none(A_FCHS,S_NO))); end;
end; end;
end; end;
{ Here was a problem... } { Here was a problem... }
{ Operand to be negated always } { Operand to be negated always }
{ seems to be converted to signed } { seems to be converted to signed }
@ -552,6 +592,8 @@ implementation
var var
hl : plabel; hl : plabel;
opsize : topsize; opsize : topsize;
hr : preference;
begin begin
if is_boolean(p^.resulttype) then if is_boolean(p^.resulttype) then
begin begin
@ -640,6 +682,44 @@ implementation
emit_reg_reg(A_PXOR,S_D,R_MM7,p^.location.register); emit_reg_reg(A_PXOR,S_D,R_MM7,p^.location.register);
end end
{$endif SUPPORT_MMX} {$endif SUPPORT_MMX}
else if is_64bitint(p^.left^.resulttype) then
begin
secondpass(p^.left);
clear_location(p^.location);
p^.location.loc:=LOC_REGISTER;
case p^.left^.location.loc of
LOC_REGISTER :
begin
p^.location.registerlow:=p^.left^.location.registerlow;
p^.location.registerhigh:=p^.left^.location.registerhigh;
exprasmlist^.concat(new(pai386,op_reg(A_NOT,S_L,p^.location.registerlow)));
exprasmlist^.concat(new(pai386,op_reg(A_NOT,S_L,p^.location.registerhigh)));
end;
LOC_CREGISTER :
begin
p^.location.registerlow:=getregister32;
p^.location.registerhigh:=getregister32;
emit_reg_reg(A_MOV,S_L,p^.left^.location.registerlow,p^.location.registerlow);
emit_reg_reg(A_MOV,S_L,p^.left^.location.registerhigh,p^.location.registerhigh);
exprasmlist^.concat(new(pai386,op_reg(A_NOT,S_L,p^.location.registerlow)));
exprasmlist^.concat(new(pai386,op_reg(A_NOT,S_L,p^.location.registerhigh)));
end;
LOC_REFERENCE,LOC_MEM :
begin
del_reference(p^.left^.location.reference);
p^.location.registerlow:=getregister32;
p^.location.registerhigh:=getregister32;
exprasmlist^.concat(new(pai386,op_ref_reg(A_MOV,S_L,
newreference(p^.left^.location.reference),p^.location.registerlow)));
hr:=newreference(p^.left^.location.reference);
inc(hr^.offset,4);
exprasmlist^.concat(new(pai386,op_ref_reg(A_MOV,S_L,
hr,p^.location.registerhigh)));
exprasmlist^.concat(new(pai386,op_reg(A_NOT,S_L,p^.location.registerlow)));
exprasmlist^.concat(new(pai386,op_reg(A_NOT,S_L,p^.location.registerhigh)));
end;
end;
end
else else
begin begin
secondpass(p^.left); secondpass(p^.left);
@ -674,7 +754,12 @@ implementation
end. end.
{ {
$Log$ $Log$
Revision 1.14 1998-12-11 16:10:07 florian Revision 1.15 1998-12-11 16:50:22 florian
+ typed const int64 and qword
+ unary minus-operator q1:=-q2;
+ not-operator
Revision 1.14 1998/12/11 16:10:07 florian
+ shifting for 64 bit ints added + shifting for 64 bit ints added
* bug in getexplicitregister32 fixed: usableregs wasn't decremented !! * bug in getexplicitregister32 fixed: usableregs wasn't decremented !!

19
compiler/ptconst.pas
View File

@ -139,6 +139,18 @@ unit ptconst;
datasegment^.concat(new(pai_const,init_16bit(p^.value))); datasegment^.concat(new(pai_const,init_16bit(p^.value)));
check_range; check_range;
end; end;
s64bitint,
u64bit:
begin
if not is_constintnode(p) then
Message(cg_e_illegal_expression)
else
begin
{!!!!! hmmm, we can write yet only consts til 2^32-1 :( (FK) }
datasegment^.concat(new(pai_const,init_32bit(p^.value)));
datasegment^.concat(new(pai_const,init_32bit(0)));
end;
end;
end; end;
disposetree(p); disposetree(p);
end; end;
@ -647,7 +659,12 @@ unit ptconst;
end. end.
{ {
$Log$ $Log$
Revision 1.31 1998-12-11 00:03:41 peter Revision 1.32 1998-12-11 16:50:23 florian
+ typed const int64 and qword
+ unary minus-operator q1:=-q2;
+ not-operator
Revision 1.31 1998/12/11 00:03:41 peter
+ globtype,tokens,version unit splitted from globals + globtype,tokens,version unit splitted from globals
Revision 1.30 1998/11/27 14:34:42 peter Revision 1.30 1998/11/27 14:34:42 peter

34
compiler/tcmat.pas
View File

@ -227,6 +227,22 @@ implementation
} }
end end
{$endif SUPPORT_MMX} {$endif SUPPORT_MMX}
else if is_64bitint(p^.left^.resulttype) then
begin
firstpass(p^.left);
p^.registersfpu:=p^.left^.registersfpu;
{$ifdef SUPPORT_MMX}
p^.registersmmx:=p^.left^.registersmmx;
{$endif SUPPORT_MMX}
p^.registers32:=p^.left^.registers32;
if codegenerror then
exit;
if (p^.left^.location.loc<>LOC_REGISTER) and
(p^.registers32<2) then
p^.registers32:=2;
p^.location.loc:=LOC_REGISTER;
p^.resulttype:=p^.left^.resulttype;
end
else if (p^.left^.resulttype^.deftype=orddef) then else if (p^.left^.resulttype^.deftype=orddef) then
begin begin
p^.left:=gentypeconvnode(p^.left,s32bitdef); p^.left:=gentypeconvnode(p^.left,s32bitdef);
@ -318,6 +334,17 @@ implementation
end end
else else
{$endif SUPPORT_MMX} {$endif SUPPORT_MMX}
if is_64bitint(p^.left^.resulttype) then
begin
p^.registers32:=p^.left^.registers32;
if (p^.location.loc in [LOC_REFERENCE,LOC_MEM,LOC_CREGISTER]) then
begin
p^.location.loc:=LOC_REGISTER;
if (p^.registers32<2) then
p^.registers32:=2;
end;
end
else
begin begin
p^.left:=gentypeconvnode(p^.left,s32bitdef); p^.left:=gentypeconvnode(p^.left,s32bitdef);
firstpass(p^.left); firstpass(p^.left);
@ -342,7 +369,12 @@ implementation
end. end.
{ {
$Log$ $Log$
Revision 1.9 1998-12-11 16:10:12 florian Revision 1.10 1998-12-11 16:50:24 florian
+ typed const int64 and qword
+ unary minus-operator q1:=-q2;
+ not-operator
Revision 1.9 1998/12/11 16:10:12 florian
+ shifting for 64 bit ints added + shifting for 64 bit ints added
* bug in getexplicitregister32 fixed: usableregs wasn't decremented !! * bug in getexplicitregister32 fixed: usableregs wasn't decremented !!