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* llvm implementation of tmoddivnode
o doesn't reuse the generic code generator methods, as the div-to-mul/shift optimization can be performed by llvm if necessary git-svn-id: branches/hlcgllvm@28205 -
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@ -30,6 +30,10 @@ uses
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node, nmat, ncgmat, cgbase;
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type
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tllvmmoddivnode = class(tcgmoddivnode)
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procedure pass_generate_code; override;
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end;
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Tllvmunaryminusnode = class(tcgunaryminusnode)
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procedure emit_float_sign_change(r: tregister; _size : tdef);override;
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end;
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@ -48,6 +52,36 @@ uses
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llvmbase,
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ncgutil, cgutils;
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{*****************************************************************************
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tllvmmoddivnode
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*****************************************************************************}
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procedure tllvmmoddivnode.pass_generate_code;
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var
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op: tllvmop;
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begin
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secondpass(left);
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secondpass(right);
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if is_signed(left.resultdef) then
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if nodetype=divn then
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op:=la_sdiv
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else
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op:=la_srem
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else if nodetype=divn then
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op:=la_udiv
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else
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op:=la_urem;
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hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,resultdef,true);
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if right.location.loc<>LOC_CONSTANT then
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hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,resultdef,true);
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location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
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location.register:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
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if right.location.loc=LOC_CONSTANT then
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current_asmdata.CurrAsmList.concat(taillvm.op_reg_size_reg_const(op,location.register,resultdef,left.location.register,right.location.value))
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else
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current_asmdata.CurrAsmList.concat(taillvm.op_reg_size_reg_reg(op,location.register,resultdef,left.location.register,right.location.register))
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end;
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{*****************************************************************************
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Tllvmunaryminusnode
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*****************************************************************************}
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@ -77,8 +111,8 @@ end;
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begin
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(*
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cmoddivnode := tllvmmoddivnode;
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(*
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cshlshrnode := tllvmshlshrnode;
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cnotnode := tllvmnotnode;
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*)
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