From 1d34e96064fe7915502a779c6490dc0b9d41aee8 Mon Sep 17 00:00:00 2001 From: nickysn Date: Sat, 22 Apr 2017 22:07:05 +0000 Subject: [PATCH] + added x86 instruction flag Ch_RFLAGScc, indicating instructions that read specific bits from the flags register, according to their condition (used by Jcc/SETcc/CMOVcc) git-svn-id: trunk@35907 - --- compiler/i386/aoptcpu.pas | 4 ++-- compiler/i386/i386prop.inc | 6 +++--- compiler/i8086/i8086prop.inc | 6 +++--- compiler/x86/aasmcpu.pas | 2 ++ compiler/x86/x86ins.dat | 6 +++--- compiler/x86_64/x8664pro.inc | 6 +++--- 6 files changed, 16 insertions(+), 14 deletions(-) diff --git a/compiler/i386/aoptcpu.pas b/compiler/i386/aoptcpu.pas index bc8e14ab37..ed0c26712c 100644 --- a/compiler/i386/aoptcpu.pas +++ b/compiler/i386/aoptcpu.pas @@ -235,7 +235,7 @@ unit aoptcpu; end; if ([Ch_RCarryFlag,Ch_RParityFlag,Ch_RAuxiliaryFlag,Ch_RZeroFlag,Ch_RSignFlag,Ch_ROverflowFlag, Ch_RWCarryFlag,Ch_RWParityFlag,Ch_RWAuxiliaryFlag,Ch_RWZeroFlag,Ch_RWSignFlag,Ch_RWOverflowFlag, - Ch_RFlags,Ch_RWFlags]*Ch<>[]) and (reg=NR_DEFAULTFLAGS) then + Ch_RFlags,Ch_RWFlags,Ch_RFLAGScc]*Ch<>[]) and (reg=NR_DEFAULTFLAGS) then begin RegReadByInstruction := true; exit @@ -289,7 +289,7 @@ function InstrReadsFlags(p: tai): boolean; if InsProp[taicpu(p).opcode].Ch* [Ch_RCarryFlag,Ch_RParityFlag,Ch_RAuxiliaryFlag,Ch_RZeroFlag,Ch_RSignFlag,Ch_ROverflowFlag, Ch_RWCarryFlag,Ch_RWParityFlag,Ch_RWAuxiliaryFlag,Ch_RWZeroFlag,Ch_RWSignFlag,Ch_RWOverflowFlag, - Ch_RFlags,Ch_RWFlags,Ch_All]<>[] then + Ch_RFlags,Ch_RWFlags,Ch_RFLAGScc,Ch_All]<>[] then exit; ait_label: exit; diff --git a/compiler/i386/i386prop.inc b/compiler/i386/i386prop.inc index 1294fd7b97..068db71f50 100644 --- a/compiler/i386/i386prop.inc +++ b/compiler/i386/i386prop.inc @@ -383,9 +383,9 @@ (Ch: [Ch_All]), (Ch: [Ch_All]), (Ch: [Ch_All]), -(Ch: [Ch_ROp1, Ch_RWOp2, Ch_RFLAGS]), -(Ch: [Ch_RFLAGS]), -(Ch: [Ch_RFLAGS, Ch_WOp1]), +(Ch: [Ch_ROp1, Ch_RWOp2, Ch_RFLAGScc]), +(Ch: [Ch_RFLAGScc]), +(Ch: [Ch_RFLAGScc, Ch_WOp1]), (Ch: [Ch_Mop2, Ch_Rop1]), (Ch: [Ch_Mop2, Ch_Rop1]), (Ch: [Ch_Mop2, Ch_Rop1]), diff --git a/compiler/i8086/i8086prop.inc b/compiler/i8086/i8086prop.inc index 04c0a15d12..c19ab47c05 100644 --- a/compiler/i8086/i8086prop.inc +++ b/compiler/i8086/i8086prop.inc @@ -383,9 +383,9 @@ (Ch: [Ch_All]), (Ch: [Ch_All]), (Ch: [Ch_All]), -(Ch: [Ch_ROp1, Ch_RWOp2, Ch_RFLAGS]), -(Ch: [Ch_RFLAGS]), -(Ch: [Ch_RFLAGS, Ch_WOp1]), +(Ch: [Ch_ROp1, Ch_RWOp2, Ch_RFLAGScc]), +(Ch: [Ch_RFLAGScc]), +(Ch: [Ch_RFLAGScc, Ch_WOp1]), (Ch: [Ch_Mop2, Ch_Rop1]), (Ch: [Ch_Mop2, Ch_Rop1]), (Ch: [Ch_Mop2, Ch_Rop1]), diff --git a/compiler/x86/aasmcpu.pas b/compiler/x86/aasmcpu.pas index 2bd756ab7c..1e391d28ca 100644 --- a/compiler/x86/aasmcpu.pas +++ b/compiler/x86/aasmcpu.pas @@ -226,6 +226,8 @@ interface Ch_RWCarryFlag,Ch_RWParityFlag,Ch_RWAuxiliaryFlag,Ch_RWZeroFlag,Ch_RWSignFlag,Ch_RWOverflowFlag, {more specialized flag bits (not considered part of NR_DEFAULTFLAGS by the compiler)} Ch_RDirFlag,Ch_W0DirFlag,Ch_W1DirFlag,Ch_W0IntFlag,Ch_W1IntFlag, + {instruction reads flag bits, according to its condition (used by Jcc/SETcc/CMOVcc)} + Ch_RFLAGScc, {read/write/read+write the entire flags/eflags/rflags register} Ch_RFlags, Ch_WFlags, Ch_RWFlags, Ch_FPU, diff --git a/compiler/x86/x86ins.dat b/compiler/x86/x86ins.dat index 2af9dbc85e..4f5dee227e 100644 --- a/compiler/x86/x86ins.dat +++ b/compiler/x86/x86ins.dat @@ -2098,11 +2098,11 @@ void \333\3\x0F\xA7\xE0 P6,CYRIX void \333\3\x0F\xA7\xE8 P6,CYRIX [CMOVcc,cmovCCX] -(Ch_ROp1, Ch_RWOp2, Ch_RFLAGS) +(Ch_ROp1, Ch_RWOp2, Ch_RFLAGScc) reg16|32|64,regmem \320\1\x0F\13\x40\110 P6,SM [Jcc] -(Ch_RFLAGS) +(Ch_RFLAGScc) imm8 \13\x70\50 8086 imm16|32 \320\1\x0F\13\x80\64 386,PASS2 imm16 \23\x70\1\x03\1\xE9\60 8086,PASS2,16BITONLY @@ -2111,7 +2111,7 @@ imm|near \320\1\x0F\13\x80\64 386,PASS2 imm16|near \23\x70\1\x03\1\xE9\60 8086,PASS2,16BITONLY [SETcc,setCCX] -(Ch_RFLAGS, Ch_WOp1) +(Ch_RFLAGScc, Ch_WOp1) rm8 \1\x0F\13\x90\200 386 ; diff --git a/compiler/x86_64/x8664pro.inc b/compiler/x86_64/x8664pro.inc index c1445707d3..ad344800f2 100644 --- a/compiler/x86_64/x8664pro.inc +++ b/compiler/x86_64/x8664pro.inc @@ -368,9 +368,9 @@ (Ch: [Ch_All]), (Ch: [Ch_All]), (Ch: [Ch_All]), -(Ch: [Ch_ROp1, Ch_RWOp2, Ch_RFLAGS]), -(Ch: [Ch_RFLAGS]), -(Ch: [Ch_RFLAGS, Ch_WOp1]), +(Ch: [Ch_ROp1, Ch_RWOp2, Ch_RFLAGScc]), +(Ch: [Ch_RFLAGScc]), +(Ch: [Ch_RFLAGScc, Ch_WOp1]), (Ch: [Ch_Mop2, Ch_Rop1]), (Ch: [Ch_Mop2, Ch_Rop1]), (Ch: [Ch_Mop2, Ch_Rop1]),