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+ MIPS: implemented more peephole optimizations.
git-svn-id: trunk@28536 -
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@ -28,15 +28,19 @@ unit aoptcpu;
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Interface
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uses
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cgbase, cpubase, aoptobj, aoptcpub, aopt, aasmtai;
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cgbase, cpubase, aoptobj, aoptcpub, aopt, aasmtai, aasmcpu;
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Type
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TAsmOpSet = set of TAsmOp;
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TCpuAsmOptimizer = class(TAsmOptimizer)
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function RegModifiedByInstruction(Reg: TRegister; p1: tai): boolean; override;
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function GetNextInstructionUsingReg(Current: tai;
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var Next: tai; reg: TRegister): Boolean;
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function RegUsedAfterInstruction(reg: Tregister; p: tai;
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var AllUsedRegs: TAllUsedRegs): Boolean;
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function TryRemoveMov(var p: tai; opcode: TAsmOp): boolean;
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function TryRemoveMovBeforeStore(var p: tai; next: taicpu; const storeops: TAsmOpSet): boolean;
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function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
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procedure PeepHoleOptPass2; override;
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End;
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@ -44,7 +48,7 @@ unit aoptcpu;
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Implementation
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uses
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globals,aasmbase,aasmcpu,cpuinfo,verbose;
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globals,aasmbase,cpuinfo,verbose;
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function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
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@ -170,6 +174,20 @@ unit aoptcpu;
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end;
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function TCpuAsmOptimizer.RegModifiedByInstruction(Reg: TRegister; p1: tai): boolean;
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var
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i : Longint;
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begin
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result:=false;
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for i:=0 to taicpu(p1).ops-1 do
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if (taicpu(p1).oper[i]^.typ=top_reg) and (taicpu(p1).oper[i]^.reg=Reg) and (taicpu(p1).spilling_get_operation_type(i) in [operand_write,operand_readwrite]) then
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begin
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result:=true;
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exit;
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end;
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end;
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function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
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var Next: tai; reg: TRegister): Boolean;
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begin
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@ -261,6 +279,23 @@ unit aoptcpu;
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end;
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function TCpuAsmOptimizer.TryRemoveMovBeforeStore(var p: tai; next: taicpu; const storeops: TAsmOpSet): boolean;
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begin
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result:=(next.opcode in storeops) and
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MatchOperand(next.oper[0]^,taicpu(p).oper[0]^.reg) and
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{ Ry cannot be modified between move and store }
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(not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) and
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Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next)));
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if result then
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begin
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next.loadreg(0,taicpu(p).oper[1]^.reg);
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asml.remove(p);
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p.free;
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p:=next;
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end;
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end;
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function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
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var
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next,next2: tai;
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@ -385,6 +420,92 @@ unit aoptcpu;
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TryRemoveMov(p,A_MOVE);
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end;
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A_MOV_S:
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begin
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if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
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(next.typ=ait_instruction) then
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begin
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if TryRemoveMovBeforeStore(p,taicpu(next),[A_SWC1]) then
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{ optimization successful };
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end;
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end;
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A_MOV_D:
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begin
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if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
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(next.typ=ait_instruction) then
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begin
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if TryRemoveMovBeforeStore(p,taicpu(next),[A_SDC1]) then
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{ optimization successful };
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end;
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end;
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A_MOVE:
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begin
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if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
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(next.typ=ait_instruction) then
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begin
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{ MOVE Rx,Ry; store Rx,(ref); dealloc Rx ==> store Ry,(ref) }
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if TryRemoveMovBeforeStore(p,taicpu(next),[A_SB,A_SH,A_SW]) then
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{ optimization successful }
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{ MOVE Rx,Ry; opcode Rx,Rx,any ==> opcode Rx,Ry,any
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MOVE Rx,Ry; opcode Rx,Rz,Rx ==> opcode Rx,Rz,Ry }
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else if (taicpu(next).opcode in [A_ADD,A_ADDU,A_ADDI,A_ADDIU,A_SUB,A_SUBU]) and
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MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) and
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(not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) then
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begin
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if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) then
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begin
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taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
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asml.remove(p);
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p.free;
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p:=next;
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end
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{ TODO: if Ry=NR_R0, this effectively changes instruction into MOVE,
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providing further optimization possibilities }
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else if MatchOperand(taicpu(next).oper[2]^,taicpu(p).oper[0]^.reg) then
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begin
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taicpu(next).loadreg(2,taicpu(p).oper[1]^.reg);
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asml.remove(p);
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p.free;
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p:=next;
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end;
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end
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{ MOVE Rx,Ry; opcode Rz,Rx,any; dealloc Rx ==> opcode Rz,Ry,any }
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else if (taicpu(next).opcode in [A_ADD,A_ADDU,A_ADDI,A_ADDIU,A_SUB,A_SUBU,A_SLT,A_SLTU]) and
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MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) and
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(not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) and
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Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
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begin
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taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
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asml.remove(p);
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p.free;
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p:=next;
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end
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{ MULT[U] must be handled separately }
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else if (taicpu(next).opcode in [A_MULT,A_MULTU]) and
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(not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) and
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Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
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begin
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if MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) then
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begin
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taicpu(next).loadreg(0,taicpu(p).oper[1]^.reg);
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asml.remove(p);
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p.free;
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p:=next;
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end
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else if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) then
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begin
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taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
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asml.remove(p);
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p.free;
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p:=next;
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end;
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end;
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{ TODO: MOVE Rx,Ry; Bcc Rx,Rz,label; dealloc Rx ==> Bcc Ry,Rz,label }
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end;
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end;
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A_LB,A_LBU,A_LH,A_LHU,A_LW,
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A_ADD,A_ADDU,
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A_ADDI,A_ADDIU,
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