From 1eb575fa22062f26e9a74856ea1852ad35e06cec Mon Sep 17 00:00:00 2001
From: florian <florian@freepascal.org>
Date: Tue, 24 Aug 2004 21:02:32 +0000
Subject: [PATCH] * fixed longbool(<int64>) on sparc
---
compiler/cgbase.pas | 8 +++++--
compiler/defutil.pas | 9 +++++---
compiler/rgobj.pas | 15 +++++++-----
compiler/sparc/cgcpu.pas | 7 ++++--
compiler/sparc/cpubase.pas | 26 +++++++++++++--------
compiler/sparc/itcpugas.pas | 15 ++++++++----
compiler/sparc/ncpucnv.pas | 46 +++++++++++++++++++++++--------------
compiler/sparc/rgcpu.pas | 40 ++++++++++++++++++++++----------
8 files changed, 110 insertions(+), 56 deletions(-)
diff --git a/compiler/cgbase.pas b/compiler/cgbase.pas
index 6b13ff4e5b..995a2933c7 100644
--- a/compiler/cgbase.pas
+++ b/compiler/cgbase.pas
@@ -130,7 +130,8 @@ interface
R_SUBQ, { = 5; 64 bits, Like RAX }
{ For Sparc floats that use F0:F1 to store doubles }
R_SUBFS, { = 6; Float that allocates 1 FPU register }
- R_SUBFD { = 7; Float that allocates 2 FPU registers }
+ R_SUBFD, { = 7; Float that allocates 2 FPU registers }
+ R_SUBFQ { = 8; Float that allocates 4 FPU registers }
);
TSuperRegister = type word;
@@ -606,7 +607,10 @@ finalization
end.
{
$Log$
- Revision 1.93 2004-07-19 19:21:02 florian
+ Revision 1.94 2004-08-24 21:02:32 florian
+ * fixed longbool(<int64>) on sparc
+
+ Revision 1.93 2004/07/19 19:21:02 florian
* indexword in 1.0.x is broken
Revision 1.92 2004/07/18 15:14:59 jonas
diff --git a/compiler/defutil.pas b/compiler/defutil.pas
index fd82ac9876..d0c0c9e22b 100644
--- a/compiler/defutil.pas
+++ b/compiler/defutil.pas
@@ -831,9 +831,9 @@ implementation
enumdef,
setdef:
begin
- result := int_cgsize(def.size);
+ result:=int_cgsize(def.size);
if is_signed(def) then
- result := tcgsize(ord(result)+(ord(OS_S8)-ord(OS_8)));
+ result:=tcgsize(ord(result)+(ord(OS_S8)-ord(OS_8)));
end;
classrefdef,
pointerdef:
@@ -888,7 +888,10 @@ implementation
end.
{
$Log$
- Revision 1.18 2004-06-20 08:55:29 florian
+ Revision 1.19 2004-08-24 21:02:32 florian
+ * fixed longbool(<int64>) on sparc
+
+ Revision 1.18 2004/06/20 08:55:29 florian
* logs truncated
Revision 1.17 2004/06/18 15:16:46 peter
diff --git a/compiler/rgobj.pas b/compiler/rgobj.pas
index 0b4c1e4641..0ce359650b 100644
--- a/compiler/rgobj.pas
+++ b/compiler/rgobj.pas
@@ -1882,12 +1882,12 @@ unit rgobj;
i: longint;
supreg: tsuperregister;
begin
- supreg := getsupreg(reg);
- for i := 0 to pred(regindex) do
+ supreg:=getsupreg(reg);
+ for i:=0 to pred(regindex) do
if (regs[i].mustbespilled) and
- (regs[i].orgreg = supreg) then
+ (regs[i].orgreg=supreg) then
begin
- reg := regs[i].tempreg;
+ reg:=regs[i].tempreg;
break;
end;
end;
@@ -1957,7 +1957,7 @@ unit rgobj;
end;
{ substitute registers }
- for counter := 0 to instr.ops-1 do
+ for counter:=0 to instr.ops-1 do
with instr.oper[counter]^ do
begin
case typ of
@@ -1986,7 +1986,10 @@ unit rgobj;
end.
{
$Log$
- Revision 1.133 2004-07-09 21:38:30 daniel
+ Revision 1.134 2004-08-24 21:02:32 florian
+ * fixed longbool(<int64>) on sparc
+
+ Revision 1.133 2004/07/09 21:38:30 daniel
* Add check <= 255 when adding to adj_colours
Revision 1.132 2004/07/08 09:57:55 daniel
diff --git a/compiler/sparc/cgcpu.pas b/compiler/sparc/cgcpu.pas
index a3bfd81dea..44b51a8737 100644
--- a/compiler/sparc/cgcpu.pas
+++ b/compiler/sparc/cgcpu.pas
@@ -224,7 +224,7 @@ implementation
procedure Tcgsparc.init_register_allocators;
begin
inherited init_register_allocators;
- rg[R_INTREGISTER]:=Trgcpu.create(R_INTREGISTER,R_SUBWHOLE,
+ rg[R_INTREGISTER]:=Trgcpu.create(R_INTREGISTER,R_SUBD,
[RS_O0,RS_O1,RS_O2,RS_O3,RS_O4,RS_O5,
RS_L0,RS_L1,RS_L2,RS_L3,RS_L4,RS_L5,RS_L6,RS_L7],
first_int_imreg,[]);
@@ -1108,7 +1108,10 @@ begin
end.
{
$Log$
- Revision 1.84 2004-06-20 08:55:32 florian
+ Revision 1.85 2004-08-24 21:02:32 florian
+ * fixed longbool(<int64>) on sparc
+
+ Revision 1.84 2004/06/20 08:55:32 florian
* logs truncated
Revision 1.83 2004/06/16 20:07:10 florian
diff --git a/compiler/sparc/cpubase.pas b/compiler/sparc/cpubase.pas
index 4cbc5b5bfa..087836304c 100644
--- a/compiler/sparc/cpubase.pas
+++ b/compiler/sparc/cpubase.pas
@@ -66,7 +66,7 @@ uses
{$i rspsup.inc}
{ No Subregisters }
- R_SUBWHOLE=R_SUBNONE;
+ R_SUBWHOLE = R_SUBD;
{ Available Registers }
{$i rspcon.inc}
@@ -518,7 +518,10 @@ implementation
function cgsize2subreg(s:Tcgsize):Tsubregister;
begin
- cgsize2subreg:=R_SUBWHOLE;
+ if s in [OS_64,OS_S64] then
+ cgsize2subreg:=R_SUBQ
+ else
+ cgsize2subreg:=R_SUBWHOLE;
end;
@@ -540,11 +543,17 @@ implementation
end;
+ function findreg_by_number(r:Tregister):tregisterindex;
+ begin
+ result:=findreg_by_number_table(r,regnumber_index);
+ end;
+
+
function std_regname(r:Tregister):string;
var
p : tregisterindex;
begin
- p:=findreg_by_number_table(r,regnumber_index);
+ p:=findreg_by_number(r);
if p<>0 then
result:=std_regname_table[p]
else
@@ -558,16 +567,13 @@ implementation
end;
- function findreg_by_number(r:Tregister):tregisterindex;
- begin
- result:=findreg_by_number_table(r,regnumber_index);
- end;
-
-
end.
{
$Log$
- Revision 1.70 2004-08-15 13:30:18 florian
+ Revision 1.71 2004-08-24 21:02:33 florian
+ * fixed longbool(<int64>) on sparc
+
+ Revision 1.70 2004/08/15 13:30:18 florian
* fixed alignment of variant records
* more alignment problems fixed
diff --git a/compiler/sparc/itcpugas.pas b/compiler/sparc/itcpugas.pas
index d4bd1bf125..7c22014a1b 100644
--- a/compiler/sparc/itcpugas.pas
+++ b/compiler/sparc/itcpugas.pas
@@ -2,7 +2,7 @@
$Id$
Copyright (c) 1998-2002 by Mazen NEIFER
- This unit contains the PowerPC GAS instruction tables
+ This unit contains the SPARC GAS instruction tables
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@@ -81,8 +81,12 @@ implementation
p : longint;
begin
{ Double uses the same table as single }
- if getsubreg(r)=R_SUBFD then
- setsubreg(r,R_SUBFS);
+ case getsubreg(r) of
+ R_SUBFD:
+ setsubreg(r,R_SUBFS);
+ R_SUBL,R_SUBW,R_SUBD,R_SUBQ:
+ setsubreg(r,R_SUBNONE);
+ end;
p:=findreg_by_number(r);
if p<>0 then
result:=gas_regname_table[p]
@@ -93,7 +97,10 @@ implementation
end.
{
$Log$
- Revision 1.3 2004-06-20 08:55:32 florian
+ Revision 1.4 2004-08-24 21:02:33 florian
+ * fixed longbool(<int64>) on sparc
+
+ Revision 1.3 2004/06/20 08:55:32 florian
* logs truncated
Revision 1.2 2004/01/12 16:39:41 peter
diff --git a/compiler/sparc/ncpucnv.pas b/compiler/sparc/ncpucnv.pas
index 1ccf986fc5..c7c74f6dbd 100644
--- a/compiler/sparc/ncpucnv.pas
+++ b/compiler/sparc/ncpucnv.pas
@@ -168,7 +168,8 @@ implementation
objectlibrary.getlabel(falselabel);
secondpass(left);
if codegenerror then
- exit;
+ exit;
+
{ byte(boolean) or word(wordbool) or longint(longbool) must }
{ be accepted for var parameters }
if (nf_explicit in flags)and
@@ -180,23 +181,33 @@ implementation
falselabel:=oldfalselabel;
exit;
end;
- location_reset(location,LOC_REGISTER,def_cgsize(left.resulttype.def));
- opsize := def_cgsize(left.resulttype.def);
+ location_reset(location,LOC_REGISTER,def_cgsize(resulttype.def));
+ opsize:=def_cgsize(left.resulttype.def);
case left.location.loc of
LOC_CREFERENCE,LOC_REFERENCE,LOC_REGISTER,LOC_CREGISTER:
begin
if left.location.loc in [LOC_CREFERENCE,LOC_REFERENCE] then
begin
reference_release(exprasmlist,left.location.reference);
- hreg2:=cg.GetIntRegister(exprasmlist,opsize);
- cg.a_load_ref_reg(exprasmlist,OpSize,OpSize,left.location.reference,hreg2);
+ hreg2:=cg.getintregister(exprasmlist,opsize);
+ cg.a_load_ref_reg(exprasmlist,opsize,opsize,left.location.reference,hreg2);
end
else
hreg2:=left.location.register;
- exprasmlist.concat(taicpu.op_reg_reg_reg(A_SUBCC,NR_G0,hreg2,NR_G0));
- cg.UnGetRegister(exprasmlist,hreg2);
- hreg1:=cg.GetIntRegister(exprasmlist,opsize);
- exprasmlist.concat(taicpu.op_reg_const_reg(A_ADDX,NR_G0,0,hreg1));
+{$ifndef cpu64bit}
+ if left.location.size in [OS_64,OS_S64] then
+ begin
+ cg.ungetregister(exprasmlist,hreg2);
+ hreg1:=cg.getintregister(exprasmlist,OS_32);
+ cg.a_op_reg_reg_reg(exprasmlist,OP_OR,OS_32,hreg2,succ(hreg2),hreg1);
+ hreg2:=hreg1;
+ opsize:=OS_32;
+ end;
+{$endif cpu64bit}
+ exprasmlist.concat(taicpu.op_reg_reg_reg(A_SUBCC,NR_G0,hreg2,NR_G0));
+ cg.ungetregister(exprasmlist,hreg2);
+ hreg1:=cg.getintregister(exprasmlist,opsize);
+ exprasmlist.concat(taicpu.op_reg_const_reg(A_ADDX,NR_G0,0,hreg1));
end;
LOC_FLAGS :
begin
@@ -218,13 +229,11 @@ implementation
else
internalerror(10062);
end;
- with Location do
- begin
- location.register := hreg1;
- if Size in [OS_64, OS_S64]
- then
- RegisterHigh:=Tregister(LongInt(hReg1)+1);{Alrady allocated OS_64}
- end;
+ location.register:=hreg1;
+
+ if location.size in [OS_64, OS_S64] then
+ internalerror(200408241);
+
truelabel:=oldtruelabel;
falselabel:=oldfalselabel;
end;
@@ -235,7 +244,10 @@ begin
end.
{
$Log$
- Revision 1.29 2004-08-23 20:45:52 florian
+ Revision 1.30 2004-08-24 21:02:33 florian
+ * fixed longbool(<int64>) on sparc
+
+ Revision 1.29 2004/08/23 20:45:52 florian
* fixed boolean(<int>) on sparc
Revision 1.28 2004/08/22 20:11:38 florian
diff --git a/compiler/sparc/rgcpu.pas b/compiler/sparc/rgcpu.pas
index 12fb11fc1f..c57bd03b05 100644
--- a/compiler/sparc/rgcpu.pas
+++ b/compiler/sparc/rgcpu.pas
@@ -57,17 +57,30 @@ implementation
supreg,i: Tsuperregister;
r: Tregister;
begin
- { Let 64bit floats conflict with all odd float regs }
- if getsubreg(reg)=R_SUBFD then
- begin
- supreg:=getsupreg(reg);
- i:=RS_F1;
- while (i<=RS_F31) do
- begin
- add_edge(supreg,i);
- inc(i,2);
- end;
- end;
+ case getsubreg(reg) of
+ { Let 64bit floats conflict with all odd float regs }
+ R_SUBFD:
+ begin
+ supreg:=getsupreg(reg);
+ i:=RS_F1;
+ while (i<=RS_F31) do
+ begin
+ add_edge(supreg,i);
+ inc(i,2);
+ end;
+ end;
+ { Let 64bit ints conflict with all odd int regs }
+ R_SUBQ:
+ begin
+ supreg:=getsupreg(reg);
+ i:=RS_G1;
+ while (i<=RS_I7) do
+ begin
+ add_edge(supreg,i);
+ inc(i,2);
+ end;
+ end;
+ end;
end;
@@ -235,7 +248,10 @@ implementation
end.
{
$Log$
- Revision 1.23 2004-06-20 08:55:32 florian
+ Revision 1.24 2004-08-24 21:02:33 florian
+ * fixed longbool(<int64>) on sparc
+
+ Revision 1.23 2004/06/20 08:55:32 florian
* logs truncated
Revision 1.22 2004/06/20 08:47:33 florian