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* support for the "RaisePending" parameter of RaiseExceptions on AArch64

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git-svn-id: trunk@29951 -
This commit is contained in:
Jonas Maebe 2015-02-23 22:55:02 +00:00
parent 3d01d4ceb1
commit 1edd3ac511
1 changed files with 23 additions and 2 deletions
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25
rtl/aarch64/mathu.inc
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@ -129,8 +129,29 @@ function SetExceptionMask(const Mask: TFPUExceptionMask): TFPUExceptionMask;
procedure ClearExceptions(RaisePending: Boolean);
var
fpsr: dword;
f: TFPUException;
begin
{ todo: RaisePending = true }
fpsr:=getfpsr;
if raisepending then
begin
if (fpsr and (fpu_dze shr fpu_exception_mask_to_status_mask_shift)) <> 0 then
float_raise(exZeroDivide);
if (fpsr and (fpu_ofe shr fpu_exception_mask_to_status_mask_shift)) <> 0 then
float_raise(exOverflow);
if (fpsr and (fpu_ufe shr fpu_exception_mask_to_status_mask_shift)) <> 0 then
float_raise(exUnderflow);
if (fpsr and (fpu_ioe shr fpu_exception_mask_to_status_mask_shift)) <> 0 then
float_raise(exInvalidOp);
if (fpsr and (fpu_ixe shr fpu_exception_mask_to_status_mask_shift)) <> 0 then
float_raise(exPrecision);
if (fpsr and (fpu_ide shr fpu_exception_mask_to_status_mask_shift)) <> 0 then
float_raise(exDenormalized);
{ now the soft float exceptions }
for f in softfloat_exception_flags do
float_raise(f);
end;
softfloat_exception_flags:=[];
setfpsr(getfpsr and not(fpu_exception_mask shr fpu_exception_mask_to_status_mask_shift));
setfpsr(fpsr and not(fpu_exception_mask shr fpu_exception_mask_to_status_mask_shift));
end;