From 1f18d7ac1bb7e195fcd3c6d5bd99d8c9c9dfefcf Mon Sep 17 00:00:00 2001 From: florian Date: Sun, 25 Apr 2004 21:26:16 +0000 Subject: [PATCH] * some m68k stuff fixed --- compiler/aggas.pas | 12 +++--- compiler/m68k/agcpugas.pas | 74 ++++----------------------------- compiler/m68k/cpubase.pas | 12 +++--- compiler/m68k/m68kreg.dat | 61 +++++++++++++++------------ compiler/m68k/n68kcnv.pas | 84 +++++++------------------------------- compiler/m68k/n68kmat.pas | 77 ++++++++++++++++++---------------- compiler/m68k/ncpuadd.pas | 65 ++++++++++++++--------------- 7 files changed, 141 insertions(+), 244 deletions(-) diff --git a/compiler/aggas.pas b/compiler/aggas.pas index 444aff8ab6..f65675ca6c 100644 --- a/compiler/aggas.pas +++ b/compiler/aggas.pas @@ -57,17 +57,12 @@ interface const regname_count=45; - regname_count_bsstart=32; {Largest power of 2 out of regname_count.} + regname_count_bsstart=32; { Largest power of 2 out of regname_count. } implementation uses -{$ifdef Delphi} - dmisc, -{$else Delphi} - dos, -{$endif Delphi} cutils,globtype,systems, fmodule,finput,verbose,cpubase, itcpugas @@ -882,7 +877,10 @@ var end. { $Log$ - Revision 1.49 2004-04-12 18:59:32 florian + Revision 1.50 2004-04-25 21:26:16 florian + * some m68k stuff fixed + + Revision 1.49 2004/04/12 18:59:32 florian * small x86_64 fixes Revision 1.48 2004/03/17 22:27:41 florian diff --git a/compiler/m68k/agcpugas.pas b/compiler/m68k/agcpugas.pas index 24f1d97bf3..9349f46bd0 100644 --- a/compiler/m68k/agcpugas.pas +++ b/compiler/m68k/agcpugas.pas @@ -40,71 +40,9 @@ interface end; const - gas_op2str:op2strtable= - { warning: CPU32 opcodes are not fully compatible with the MC68020. } - { 68000 only opcodes } - ('abcd', - 'add','adda','addi','addq','addx','and','andi', - 'asl','asr','bcc','bcs','beq','bge','bgt','bhi', - 'ble','bls','blt','bmi','bne','bpl','bvc','bvs', - 'bchg','bclr','bra','bset','bsr','btst','chk', - 'clr','cmp','cmpa','cmpi','cmpm','dbcc','dbcs','dbeq','dbge', - 'dbgt','dbhi','dble','dbls','dblt','dbmi','dbne','dbra', - 'dbpl','dbt','dbvc','dbvs','dbf','divs','divu', - 'eor','eori','exg','illegal','ext','jmp','jsr', - 'lea','link','lsl','lsr','move','movea','movei','moveq', - 'movem','movep','muls','mulu','nbcd','neg','negx', - 'nop','not','or','ori','pea','rol','ror','roxl', - 'roxr','rtr','rts','sbcd','scc','scs','seq','sge', - 'sgt','shi','sle','sls','slt','smi','sne', - 'spl','st','svc','svs','sf','sub','suba','subi','subq', - 'subx','swap','tas','trap','trapv','tst','unlk', - 'rte','reset','stop', - { mc68010 instructions } - 'bkpt','movec','moves','rtd', - { mc68020 instructions } - 'bfchg','bfclr','bfexts','bfextu','bfffo', - 'bfins','bfset','bftst','callm','cas','cas2', - 'chk2','cmp2','divsl','divul','extb','pack','rtm', - 'trapcc','tracs','trapeq','trapf','trapge','trapgt', - 'traphi','traple','trapls','traplt','trapmi','trapne', - 'trappl','trapt','trapvc','trapvs','unpk', - { fpu processor instructions - directly supported only. } - { ieee aware and misc. condition codes not supported } - 'fabs','fadd', - 'fbeq','fbne','fbngt','fbgt','fbge','fbnge', - 'fblt','fbnlt','fble','fbgl','fbngl','fbgle','fbngle', - 'fdbeq','fdbne','fdbgt','fdbngt','fdbge','fdbnge', - 'fdblt','fdbnlt','fdble','fdbgl','fdbngl','fdbgle','fdbngle', - 'fseq','fsne','fsgt','fsngt','fsge','fsnge', - 'fslt','fsnlt','fsle','fsgl','fsngl','fsgle','fsngle', - 'fcmp','fdiv','fmove','fmovem', - 'fmul','fneg','fnop','fsqrt','fsub','fsgldiv', - 'fsflmul','ftst', - 'ftrapeq','ftrapne','ftrapgt','ftrapngt','ftrapge','ftrapnge', - 'ftraplt','ftrapnlt','ftraple','ftrapgl','ftrapngl','ftrapgle','ftrapngle', - { protected instructions } - 'cprestore','cpsave', - { fpu unit protected instructions } - { and 68030/68851 common mmu instructions } - { (this may include 68040 mmu instructions) } - 'frestore','fsave','pflush','pflusha','pload','pmove','ptest', - { useful for assembly language output } - 'label','none','db','s','b','fb'); - - - gas_opsize2str : array[topsize] of string[2] = - ('','.b','.w','.l','.s','.d','.x','' - ); - - gas_reg2str : reg2strtable = - ('', '%d0','%d1','%d2','%d3','%d4','%d5','%d6','%d7', - '%a0','%a1','%a2','%a3','%a4','%a5','%a6','%sp', - '-(%sp)','(%sp)+', - '%ccr','%fp0','%fp1','%fp2','%fp3','%fp4','%fp5', - '%fp6','%fp7','%fpcr','%sr','%ssp','%dfc', - '%sfc','%vbr','%fpsr'); - + gas_opsize2str : array[topsize] of string[2] = + ('','.b','.w','.l','.s','.d','.x','' + ); implementation @@ -113,7 +51,6 @@ interface verbose; - function getreferencestring(var ref : treference) : string; var s,basestr,indexstr : string; @@ -417,7 +354,10 @@ initialization end. { $Log$ - Revision 1.7 2003-02-19 22:00:16 daniel + Revision 1.8 2004-04-25 21:26:16 florian + * some m68k stuff fixed + + Revision 1.7 2003/02/19 22:00:16 daniel * Code generator converted to new register notation - Horribily outdated todo.txt removed diff --git a/compiler/m68k/cpubase.pas b/compiler/m68k/cpubase.pas index 51df699d04..debfa498f2 100644 --- a/compiler/m68k/cpubase.pas +++ b/compiler/m68k/cpubase.pas @@ -26,11 +26,10 @@ unit cpubase; {$i fpcdefs.inc} -interface - -uses - strings,cutils,cclasses,aasmbase,cpuinfo,cgbase; + interface + uses + strings,cutils,cclasses,aasmbase,cpuinfo,cgbase; {***************************************************************************** Assembler Opcodes @@ -513,7 +512,10 @@ implementation end. { $Log$ - Revision 1.25 2004-04-18 21:13:59 florian + Revision 1.26 2004-04-25 21:26:16 florian + * some m68k stuff fixed + + Revision 1.25 2004/04/18 21:13:59 florian * more adaptions for m68k Revision 1.24 2004/01/30 12:17:18 florian diff --git a/compiler/m68k/m68kreg.dat b/compiler/m68k/m68kreg.dat index 9c08304359..60d675a67f 100644 --- a/compiler/m68k/m68kreg.dat +++ b/compiler/m68k/m68kreg.dat @@ -8,37 +8,48 @@ ; NO,$00,$00,INVALID,-1 -D0,$01,$00,d0,0 -D1,$01,$01,d1,1 -D2,$01,$02,d2,2 -D3,$01,$03,d3,3 -D4,$01,$04,d4,4 -D5,$01,$05,d5,5 -D6,$01,$06,d6,6 -D7,$01,$07,d6,7 -A0,$01,$08,a0,8 -A1,$01,$09,a1,9 -A2,$01,$0a,a2,10 -A3,$01,$0b,a3,11 -A4,$01,$0c,a4,12 -A5,$01,$0d,a5,13 -A6,$01,$0e,a6,14 -SP,$01,$0f,sp,15 +D0,$01,$00,d0,%d0,0 +D1,$01,$01,d1,%d1,1 +D2,$01,$02,d2,%d2,2 +D3,$01,$03,d3,%d3,3 +D4,$01,$04,d4,%d4,4 +D5,$01,$05,d5,%d5,5 +D6,$01,$06,d6,%d6,6 +D7,$01,$07,d7,%d7,7 +A0,$01,$08,a0,%a0,8 +A1,$01,$09,a1,%a1,9 +A2,$01,$0a,a2,%a2,10 +A3,$01,$0b,a3,%a3,11 +A4,$01,$0c,a4,%a4,12 +A5,$01,$0d,a5,%a5,13 +A6,$01,$0e,a6,%a6,14 +SP,$01,$0f,sp,%sp,15 -FP0,$02,$00,fp0,16 -FP1,$02,$01,fp1,17 -FP2,$02,$02,fp2,18 -FP3,$02,$03,fp3,19 -FP4,$02,$04,fp4,20 -FP5,$02,$05,fp5,21 -FP6,$02,$06,fp6,22 -FP7,$02,$07,fp7,23 +FP0,$02,$00,fp0,%fp0,16 +FP1,$02,$01,fp1,%fp1,17 +FP2,$02,$02,fp2,%fp2,18 +FP3,$02,$03,fp3,%fp3,19 +FP4,$02,$04,fp4,%fp4,20 +FP5,$02,$05,fp5,%fp5,21 +FP6,$02,$06,fp6,%fp6,22 +FP7,$02,$07,fp7,%fp7,23 PC,$05,$00,pc,24 +CCR,$05,$01,ccr,%ccr,0 +FPCR,$05,$02,fpcr,%fpcr,0 +SR,$05,$03,sr,%sr,0 +SSP,$05,$04,ssp,%ssp,0 +DFC,$05,$05,dfc,%dfc,0 +SFC,$05,$06,sfc,%sfc,0 +VBR,$05,$07,vbr,%vbr,0 +FPSR,$05,$08,fpsr,%fpsr,0 ; ; $Log$ -; Revision 1.1 2003-12-10 02:30:58 karoly +; Revision 1.2 2004-04-25 21:26:16 florian +; * some m68k stuff fixed +; +; Revision 1.1 2003/12/10 02:30:58 karoly ; * initial revision ; ; diff --git a/compiler/m68k/n68kcnv.pas b/compiler/m68k/n68kcnv.pas index d39037a661..b7547f0f1f 100644 --- a/compiler/m68k/n68kcnv.pas +++ b/compiler/m68k/n68kcnv.pas @@ -36,7 +36,6 @@ interface procedure second_int_to_real;override; procedure second_int_to_bool;override; procedure pass_2;override; - procedure second_call_helper(c : tconverttype); override; end; implementation @@ -49,7 +48,7 @@ implementation ncon,ncal, ncgutil, cpubase,aasmcpu, - rgobj,tgobj,cgobj,cginfo,globtype,cgcpu; + rgobj,tgobj,cgobj,globtype,cgcpu; {***************************************************************************** @@ -136,7 +135,7 @@ implementation if not signed then internalerror(20020814); - location.register := rg.getregisterfpu(exprasmlist); + location.register:=cg.getfpuregister(exprasmlist,opsize); case left.location.loc of LOC_REGISTER, LOC_CREGISTER: begin @@ -184,27 +183,27 @@ implementation end else begin - hreg2:=rg.getregisterint(exprasmlist,opsize); - cg.a_load_ref_reg(exprasmlist,opsize, + hreg2:=cg.getintregister(exprasmlist,opsize); + cg.a_load_ref_reg(exprasmlist,opsize,opsize, left.location.reference,hreg2); exprasmlist.concat(taicpu.op_reg(A_TST,TCGSize2OpSize[opsize],hreg2)); - rg.ungetregister(exprasmlist,hreg2); + cg.ungetregister(exprasmlist,hreg2); end; reference_release(exprasmlist,left.location.reference); resflags:=F_NE; - hreg1 := rg.getregisterint(exprasmlist,opsize); + hreg1:=cg.getintregister(exprasmlist,opsize); end; LOC_REGISTER,LOC_CREGISTER : begin - hreg2 := left.location.register; + hreg2:=left.location.register; exprasmlist.concat(taicpu.op_reg(A_TST,TCGSize2OpSize[opsize],hreg2)); - rg.ungetregister(exprasmlist,hreg2); - hreg1 := rg.getregisterint(exprasmlist,opsize); + cg.ungetregister(exprasmlist,hreg2); + hreg1:=cg.getintregister(exprasmlist,opsize); resflags:=F_NE; end; LOC_FLAGS : begin - hreg1:=rg.getregisterint(exprasmlist,opsize); + hreg1:=cg.getintregister(exprasmlist,opsize); resflags:=left.location.resflags; end; else @@ -215,62 +214,6 @@ implementation end; - procedure tm68ktypeconvnode.second_call_helper(c : tconverttype); - - const - secondconvert : array[tconverttype] of pointer = ( - @second_nothing, {equal} - @second_nothing, {not_possible} - @second_nothing, {second_string_to_string, handled in resulttype pass } - @second_char_to_string, - @second_nothing, {char_to_charray} - @second_nothing, { pchar_to_string, handled in resulttype pass } - @second_nothing, {cchar_to_pchar} - @second_cstring_to_pchar, - @second_ansistring_to_pchar, - @second_string_to_chararray, - @second_nothing, { chararray_to_string, handled in resulttype pass } - @second_array_to_pointer, - @second_pointer_to_array, - @second_int_to_int, - @second_int_to_bool, - @second_bool_to_int, { bool_to_bool } - @second_bool_to_int, - @second_real_to_real, - @second_int_to_real, - @second_nothing, { currency_to_real, handled in resulttype pass } - @second_proc_to_procvar, - @second_nothing, { arrayconstructor_to_set } - @second_nothing, { second_load_smallset, handled in first pass } - @second_cord_to_pointer, - @second_nothing, { interface 2 string } - @second_nothing, { interface 2 guid } - @second_class_to_intf, - @second_char_to_char, - @second_nothing, { normal_2_smallset } - @second_nothing, { dynarray_2_openarray } - @second_nothing, { tc_pwchar_2_string } - {$ifdef fpc}@{$endif}second_nothing, { variant_2_dynarray } - {$ifdef fpc}@{$endif}second_nothing { dynarray_2_variant} - ); - type - tprocedureofobject = procedure of object; - - var - r : packed record - proc : pointer; - obj : pointer; - end; - - begin - { this is a little bit dirty but it works } - { and should be quite portable too } - r.proc:=secondconvert[c]; - r.obj:=self; - tprocedureofobject(r){$ifdef FPC}();{$endif FPC} - end; - - procedure tm68ktypeconvnode.pass_2; {$ifdef TESTOBJEXT2} var @@ -297,7 +240,10 @@ begin end. { $Log$ - Revision 1.11 2004-02-03 22:32:54 peter + Revision 1.12 2004-04-25 21:26:16 florian + * some m68k stuff fixed + + Revision 1.11 2004/02/03 22:32:54 peter * renamed xNNbittype to xNNinttype * renamed registers32 to registersint * replace some s32bit,u32bit with torddef([su]inttype).def.typ @@ -336,6 +282,4 @@ end. + m68k type conversion nodes + started some mathematical nodes * out of bound references should now be handled correctly - - } diff --git a/compiler/m68k/n68kmat.pas b/compiler/m68k/n68kmat.pas index a253facba3..43616c5238 100644 --- a/compiler/m68k/n68kmat.pas +++ b/compiler/m68k/n68kmat.pas @@ -27,7 +27,7 @@ unit n68kmat; interface uses - node,nmat,ncgmat,cpubase,cginfo; + node,nmat,ncgmat,cpubase,cgbase; type @@ -39,7 +39,7 @@ interface tm68kmoddivnode = class(tcgmoddivnode) procedure emit_div_reg_reg(signed: boolean;denum,num : tregister);override; procedure emit_mod_reg_reg(signed: boolean;denum,num : tregister);override; - end; + end; @@ -49,7 +49,7 @@ implementation globtype,systems, cutils,verbose,globals, symconst,symdef,aasmbase,aasmtai,aasmcpu, - cgbase,pass_1,pass_2, + pass_1,pass_2, ncon, cpuinfo,paramgr,defutil, tgobj,ncgutil,cgobj,rgobj,rgcpu,cgcpu,cg64f32; @@ -124,7 +124,7 @@ implementation location_force_reg(exprasmlist,left.location,def_cgsize(left.resulttype.def),false); location_copy(location,left.location); if location.loc=LOC_CREGISTER then - location.register := rg.getregisterint(exprasmlist,opsize); + location.register := cg.getintregister(exprasmlist,opsize); { perform the NOT operation } cg.a_op_reg_reg(exprasmlist,OP_NOT,opsize,location.register,left.location.register); end; @@ -136,65 +136,65 @@ implementation *****************************************************************************} procedure tm68kmoddivnode.emit_div_reg_reg(signed: boolean;denum,num : tregister); var - continuelabel : tasmlabel; + continuelabel : tasmlabel; reg_d0,reg_d1 : tregister; begin - { no RTL call, so inline a zero denominator verification } + { no RTL call, so inline a zero denominator verification } if aktoptprocessor <> MC68000 then - begin + begin { verify if denominator is zero } objectlibrary.getlabel(continuelabel); { compare against zero, if not zero continue } cg.a_cmp_const_reg_label(exprasmlist,OS_S32,OC_NE,0,denum,continuelabel); - cg.a_param_const(exprasmlist, OS_S32,200,paramanager.getintparaloc(exprasmlist,1)); + cg.a_param_const(exprasmlist, OS_S32,200,paramanager.getintparaloc(pocall_default,1)); cg.a_call_name(exprasmlist,'FPC_HANDLEERROR'); - paramanager.freeintparaloc(exprasmlist,1); cg.a_label(exprasmlist, continuelabel); - if signed then + if signed then exprasmlist.concat(taicpu.op_reg_reg(A_DIVS,S_L,denum,num)) else exprasmlist.concat(taicpu.op_reg_reg(A_DIVU,S_L,denum,num)); { result should be in denuminator } - cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,num,denum); + cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,num,denum); end else begin { On MC68000/68010 mw must pass through RTL routines } - reg_d0:=rg.getexplicitregisterint(exprasmlist,NR_D0); - reg_d1:=rg.getexplicitregisterint(exprasmlist,NR_D1); + reg_d0:=NR_D0; + cg.getexplicitregister(exprasmlist,NR_D0); + reg_d1:=NR_D1; + cg.getexplicitregister(exprasmlist,NR_D1); { put numerator in d0 } - cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,num,reg_d0); + cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,num,reg_d0); { put denum in D1 } - cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,denum,reg_d1); - if signed then + cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,denum,reg_d1); + if signed then cg.a_call_name(exprasmlist,'FPC_DIV_LONGINT') else cg.a_call_name(exprasmlist,'FPC_DIV_CARDINAL'); - cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,reg_d0,denum); - rg.ungetregisterint(exprasmlist,reg_d0); - rg.ungetregisterint(exprasmlist,reg_d1); + cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,reg_d0,denum); + cg.ungetregister(exprasmlist,reg_d0); + cg.ungetregister(exprasmlist,reg_d1); end; end; - + procedure tm68kmoddivnode.emit_mod_reg_reg(signed: boolean;denum,num : tregister); var tmpreg : tregister; - continuelabel : tasmlabel; + continuelabel : tasmlabel; signlabel : tasmlabel; reg_d0,reg_d1 : tregister; begin - { no RTL call, so inline a zero denominator verification } + { no RTL call, so inline a zero denominator verification } if aktoptprocessor <> MC68000 then - begin + begin { verify if denominator is zero } objectlibrary.getlabel(continuelabel); { compare against zero, if not zero continue } cg.a_cmp_const_reg_label(exprasmlist,OS_S32,OC_NE,0,denum,continuelabel); - cg.a_param_const(exprasmlist, OS_S32,200,paramanager.getintparaloc(exprasmlist,1)); + cg.a_param_const(exprasmlist, OS_S32,200,paramanager.getintparaloc(pocall_default,1)); cg.a_call_name(exprasmlist,'FPC_HANDLEERROR'); - paramanager.freeintparaloc(exprasmlist,1); cg.a_label(exprasmlist, continuelabel); - tmpreg := cg.get_scratch_reg_int(exprasmlist,OS_INT); + tmpreg:=cg.getintregister(exprasmlist,OS_INT); { we have to prepare the high register with the } { correct sign. i.e we clear it, check if the low dword reg } @@ -215,24 +215,26 @@ implementation exprasmlist.concat(taicpu.op_reg_reg_reg(A_DIVUL,S_L,denum,tmpreg,num)); { remainder in tmpreg } cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,tmpreg,denum); - cg.free_scratch_reg(exprasmlist,tmpreg); + cg.ungetregister(exprasmlist,tmpreg); end else begin { On MC68000/68010 mw must pass through RTL routines } - Reg_d0:=rg.getexplicitregisterint(exprasmlist,NR_D0); - Reg_d1:=rg.getexplicitregisterint(exprasmlist,NR_D1); + Reg_d0:=NR_D0; + cg.getexplicitregister(exprasmlist,NR_D0); + Reg_d1:=NR_D1; + cg.getexplicitregister(exprasmlist,NR_D1); { put numerator in d0 } - cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,num,Reg_D0); + cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,num,Reg_D0); { put denum in D1 } - cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,denum,Reg_D1); - if signed then + cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,denum,Reg_D1); + if signed then cg.a_call_name(exprasmlist,'FPC_MOD_LONGINT') else cg.a_call_name(exprasmlist,'FPC_MOD_CARDINAL'); - cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,Reg_D0,denum); - rg.ungetregisterint(exprasmlist,Reg_D0); - rg.ungetregisterint(exprasmlist,Reg_D1); + cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,Reg_D0,denum); + cg.ungetregister(exprasmlist,Reg_D0); + cg.ungetregister(exprasmlist,Reg_D1); end; end; @@ -244,7 +246,10 @@ begin end. { $Log$ - Revision 1.7 2003-06-07 18:57:04 jonas + Revision 1.8 2004-04-25 21:26:16 florian + * some m68k stuff fixed + + Revision 1.7 2003/06/07 18:57:04 jonas + added freeintparaloc * ppc get/freeintparaloc now check whether the parameter regs are properly allocated/deallocated (and get an extra list para) diff --git a/compiler/m68k/ncpuadd.pas b/compiler/m68k/ncpuadd.pas index 9d2c804fad..344918a78c 100644 --- a/compiler/m68k/ncpuadd.pas +++ b/compiler/m68k/ncpuadd.pas @@ -27,7 +27,7 @@ unit ncpuadd; interface uses - node,nadd,ncgadd,cpubase,cginfo; + node,nadd,ncgadd,cpubase; type @@ -37,8 +37,8 @@ interface procedure second_cmp64bit;override; procedure second_cmpboolean;override; private - function getresflags(unsigned: boolean) : tresflags; - end; + function getresflags(unsigned: boolean) : tresflags; + end; implementation @@ -110,7 +110,7 @@ implementation tmpreg : tregister; begin location_reset(location,LOC_FLAGS,OS_NO); - + case nodetype of equaln, unequaln : @@ -125,7 +125,7 @@ implementation (nodetype = gten)) then swapleftright; // now we have to check whether left >= right - tmpreg := cg.get_scratch_reg_int(exprasmlist,OS_INT); + tmpreg := cg.getintregister(exprasmlist,OS_INT); if left.location.loc = LOC_CONSTANT then begin cg.a_op_const_reg_reg(exprasmlist,OP_AND,OS_INT, @@ -147,14 +147,14 @@ implementation exprasmlist.concat(taicpu.op_reg_reg(A_AND,S_L, right.location.register,left.location.register)); end; - cg.free_scratch_reg(exprasmlist,tmpreg); + cg.ungetregister(exprasmlist,tmpreg); location.resflags := getresflags(true); end; else internalerror(2002072701); end; - - + + end; @@ -173,7 +173,7 @@ implementation location_reset(location,LOC_JUMP,OS_NO); { load values into registers (except constants) } - load_left_right(true, false); + force_reg_left_right(true, false); { determine if the comparison will be unsigned } unsigned:=not(is_signed(left.resulttype.def)) or @@ -209,7 +209,7 @@ implementation else begin useconst := false; - tmpreg := cg.get_scratch_reg_int(exprasmlist,OS_INT); + tmpreg := cg.getintregister(exprasmlist,OS_INT); cg.a_load_const_reg(exprasmlist,OS_INT, aword(right.location.value),tmpreg); end @@ -227,7 +227,7 @@ implementation begin exprasmlist.concat(taicpu.op_reg_reg(op,S_L, left.location.register,tmpreg)); - cg.free_scratch_reg(exprasmlist,tmpreg); + cg.ungetregister(exprasmlist,tmpreg); end else exprasmlist.concat(taicpu.op_reg_reg(op,S_L, @@ -244,8 +244,7 @@ implementation cgsize : TCgSize; isjump : boolean; otl,ofl : tasmlabel; - pushedregs : tmaybesave; - begin + begin if (torddef(left.resulttype.def).typ=bool8bit) or (torddef(right.resulttype.def).typ=bool8bit) then cgsize:=OS_8 @@ -279,7 +278,6 @@ implementation falselabel:=ofl; end; - maybe_save(exprasmlist,right.registersint,left.location,pushedregs); isjump:=(right.location.loc=LOC_JUMP); if isjump then begin @@ -289,7 +287,6 @@ implementation objectlibrary.getlabel(falselabel); end; secondpass(right); - maybe_restore(exprasmlist,left.location,pushedregs); if right.location.loc in [LOC_FLAGS,LOC_JUMP] then location_force_reg(exprasmlist,right.location,cgsize,false); if isjump then @@ -300,25 +297,22 @@ implementation location_reset(location,LOC_FLAGS,OS_NO); - load_left_right(true,false); + force_reg_left_right(true,false); if (left.location.loc = LOC_CONSTANT) then swapleftright; - + if (right.location.loc <> LOC_CONSTANT) then - exprasmlist.concat(taicpu.op_reg_reg(A_CMP,S_L, - left.location.register,right.location.register)) + exprasmlist.concat(taicpu.op_reg_reg(A_CMP,S_L, + left.location.register,right.location.register)) else - exprasmlist.concat(taicpu.op_const_reg(A_CMP,S_L, - longint(right.location.value),left.location.register)); + exprasmlist.concat(taicpu.op_const_reg(A_CMP,S_L, + longint(right.location.value),left.location.register)); location.resflags := getresflags(true); - end; - clear_left_right(true); - - end; - + release_reg_left_right; + end; {***************************************************************************** @@ -329,7 +323,7 @@ implementation begin (* load_left_right(true,false); - case nodetype of + case nodetype of ltn,lten, gtn,gten: begin @@ -356,11 +350,11 @@ implementation else begin if (aword(right.location.valueqword) <> 0) then - tempreg64.reglo := cg.get_scratch_reg_int(exprasmlist) + tempreg64.reglo := cg.getintregister(exprasmlist) else tempreg64.reglo := left.location.registerlow; if ((right.location.valueqword shr 32) <> 0) then - tempreg64.reghi := cg.get_scratch_reg_int(exprasmlist) + tempreg64.reghi := cg.getintregister(exprasmlist) else tempreg64.reghi := left.location.registerhigh; end; @@ -391,8 +385,8 @@ implementation end else begin - tempreg64.reglo := cg.get_scratch_reg_int(exprasmlist); - tempreg64.reghi := cg.get_scratch_reg_int(exprasmlist); + tempreg64.reglo := cg.getintregister(exprasmlist); + tempreg64.reghi := cg.getintregister(exprasmlist); cg64.a_op64_reg_reg_reg(exprasmlist,OP_XOR, left.location.register64,right.location.register64, tempreg64); @@ -403,9 +397,9 @@ implementation tempreg64.reglo,tempreg64.reghi)); cg.a_reg_dealloc(exprasmlist,R_0); if (tempreg64.reglo <> left.location.registerlow) then - cg.free_scratch_reg(exprasmlist,tempreg64.reglo); + cg.ungetregister(exprasmlist,tempreg64.reglo); if (tempreg64.reghi <> left.location.registerhigh) then - cg.free_scratch_reg(exprasmlist,tempreg64.reghi); + cg.ungetregister(exprasmlist,tempreg64.reghi); location_reset(location,LOC_FLAGS,OS_NO); location.resflags := getresflags; @@ -432,7 +426,10 @@ end. { $Log$ - Revision 1.3 2004-02-03 22:32:54 peter + Revision 1.4 2004-04-25 21:26:16 florian + * some m68k stuff fixed + + Revision 1.3 2004/02/03 22:32:54 peter * renamed xNNbittype to xNNinttype * renamed registers32 to registersint * replace some s32bit,u32bit with torddef([su]inttype).def.typ