From 1f272f8f90cb1fc0a0a9ba3723aad13ebfcc5f03 Mon Sep 17 00:00:00 2001 From: florian Date: Tue, 31 Aug 2021 21:24:28 +0200 Subject: [PATCH] * we cannot do SSA during partial writes to arrays which span multiple registers, resolves #39325 --- compiler/hlcgobj.pas | 8 +++++++- tests/webtbs/tw39325.pp | 8 ++++++++ 2 files changed, 15 insertions(+), 1 deletion(-) create mode 100644 tests/webtbs/tw39325.pp diff --git a/compiler/hlcgobj.pas b/compiler/hlcgobj.pas index 54917bfeac..b961831bd5 100644 --- a/compiler/hlcgobj.pas +++ b/compiler/hlcgobj.pas @@ -688,7 +688,8 @@ implementation fmodule, verbose,defutil,paramgr, symtable, - nbas,ncon,nld,ncgrtti,pass_2, + nbas,ncon,nld,nmem, + ncgrtti,pass_2, cgobj,cutils,procinfo, {$ifdef x86} cgx86, @@ -4652,6 +4653,11 @@ implementation inn, asn,isn: result := fen_norecurse_false; + vecn: + { we cannot do SSA during partial writes to arrays which span multiple registers, see also tw39325 } + if (tvecnode(n).left.location.loc in [LOC_CREGISTER,LOC_CFPUREGISTER,LOC_CMMXREGISTER,LOC_CMMREGISTER]) and + (tcgsize2size[reg_cgsize(tvecnode(n).left.location.register)]<>tvecnode(n).left.resultdef.size) then + result := fen_norecurse_false; else ; end; diff --git a/tests/webtbs/tw39325.pp b/tests/webtbs/tw39325.pp new file mode 100644 index 0000000000..b9821dedd0 --- /dev/null +++ b/tests/webtbs/tw39325.pp @@ -0,0 +1,8 @@ +{ %OPT=-Ooregvar } +program testopt; +var +ar: array[0..1] of byte; +begin +ar[0] := 1; +ar[1] := 2; +end.