* patch from mazen to fix zero extending of register moves where the destination

size is larger than the source size

git-svn-id: trunk@7090 -
This commit is contained in:
peter 2007-04-12 07:11:24 +00:00
parent 1a2ff69193
commit 1f7cde0306

View File

@ -577,6 +577,20 @@ implementation
else
begin
if reg1<>reg2 then
begin
if tcgsize2size[tosize] > tcgsize2size[fromsize] then
begin
list.concat(taicpu.op_reg_const_reg(A_SLL,reg1,24,reg2));
case fromsize of
OS_8,
OS_16 :
list.concat(taicpu.op_reg_const_reg(A_SRL,reg2,24,reg2));
OS_S8,
OS_S16 :
list.concat(taicpu.op_reg_const_reg(A_SRA,reg2,24,reg2));
end;
end
else
begin
{ same size, only a register mov required }
instr:=taicpu.op_reg_reg(A_MOV,reg1,reg2);
@ -587,6 +601,7 @@ implementation
end;
end;
end;
end;
procedure TCgSparc.a_loadaddr_ref_reg(list : TAsmList;const ref : TReference;r : tregister);