Merge of revisions 39731 39825 39849 39912 39913 39914 39924 39935 39999 40000 40001 40026 40115 40132 40163 from trunk to fixes_3_2

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r39731 | pierre | 2018-09-11 08:00:54 +0000 (Tue, 11 Sep 2018) | 1 line

 Disable overflow for UDIVX ans SDIVX 64-bit instructions
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--- Merging r39731 into '.':
U    compiler/sparcgen/ncpumat.pas
--- Recording mergeinfo for merge of r39731 into '.':
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r39825 | pierre | 2018-09-27 06:59:07 +0000 (Thu, 27 Sep 2018) | 1 line

 Add rtl dependency and fix fpcdir value
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--- Merging r39825 into '.':
U    packages/ide/compiler/Makefile.fpc
--- Recording mergeinfo for merge of r39825 into '.':
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r39849 | pierre | 2018-10-01 21:50:13 +0000 (Mon, 01 Oct 2018) | 1 line

 Use vfpv2 as default fpu for eabihf if cpu is below armv7
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--- Merging r39849 into '.':
U    compiler/options.pas
--- Recording mergeinfo for merge of r39849 into '.':
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r39912 | pierre | 2018-10-11 20:38:39 +0000 (Thu, 11 Oct 2018) | 1 line

 Fix ppuload for string type for i8086, use getasizeint for all string defs but short string
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r39913 | pierre | 2018-10-11 21:02:25 +0000 (Thu, 11 Oct 2018) | 1 line

 fix position of ppuload_platform for trecorddef
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r39914 | pierre | 2018-10-12 06:05:50 +0000 (Fri, 12 Oct 2018) | 1 line

 Adapt ppudump to fix introduced in revision 39912
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r39924 | pierre | 2018-10-13 11:35:34 +0000 (Sat, 13 Oct 2018) | 1 line

 Downgrade some warnings to notes for EXTDEBUG
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--- Merging r39924 into '.':
U    compiler/pass_2.pas
U    compiler/tgobj.pas
--- Recording mergeinfo for merge of r39924 into '.':
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r39935 | pierre | 2018-10-14 22:18:50 +0000 (Sun, 14 Oct 2018) | 1 line

 Add missing setting of expectloc for multiplications
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--- Merging r39935 into '.':
U    compiler/nadd.pas
--- Recording mergeinfo for merge of r39935 into '.':
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r39999 | pierre | 2018-10-20 18:44:05 +0000 (Sat, 20 Oct 2018) | 1 line

 Avoid run time error if compiled with -CR option
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--- Merging r39999 into '.':
U    compiler/m68k/cpupara.pas
--- Recording mergeinfo for merge of r39999 into '.':
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r40000 | pierre | 2018-10-20 18:49:53 +0000 (Sat, 20 Oct 2018) | 1 line

Avoid range check error when compiled with -CR
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--- Merging r40000 into '.':
U    compiler/m68k/cgcpu.pas
--- Recording mergeinfo for merge of r40000 into '.':
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r40001 | pierre | 2018-10-20 22:19:08 +0000 (Sat, 20 Oct 2018) | 1 line

 Add explicit typecast to avoid range check error
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r40026 | pierre | 2018-10-24 21:37:22 +0000 (Wed, 24 Oct 2018) | 1 line

 Explicitly disable range checking
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--- Merging r40026 into '.':
U    compiler/x86/cgx86.pas
--- Recording mergeinfo for merge of r40026 into '.':
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r40115 | pierre | 2018-10-31 22:53:11 +0000 (Wed, 31 Oct 2018) | 1 line

 Avoid range check error in ReadPosInfo
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r40132 | pierre | 2018-11-01 07:09:47 +0000 (Thu, 01 Nov 2018) | 1 line

 Only call moved if len>0, as otherwise astring local variable is nil, which leads to a range check error for astring[1]
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r40163 | pierre | 2018-11-01 21:58:54 +0000 (Thu, 01 Nov 2018) | 8 lines

  More -CriotR fixes:
  * entfile.pas: Change PPU header falgs filed from longint to dword.
  * ngtcon.pas: Change local variable startoffset type to aword.
  * omfbase.pas: Avoid calling move with a nil string s indexed as s[1],
    to avoid a range check error.
  * owomflib.pas: Disable range check explicitly in hash computation.
  * utils/ppuutils/ppudump.pp: Adapt to flags type change in entfile.pas

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git-svn-id: branches/fixes_3_2@40616 -

compiler/m68k/cgcpu.pas

@@ -2549,7 +2549,7 @@ unit cgcpu;
               cg.a_load_const_reg(list,OS_S32,longint(highvalue),hreg);
               { don't use cg.a_op_const_reg() here, because a possible optimized
                 ADDQ/SUBQ wouldn't set the eXtend bit }
-              list.concat(taicpu.op_const_reg(opcode,S_L,lowvalue,regdst.reglo));
+              list.concat(taicpu.op_const_reg(opcode,S_L,longint(lowvalue),regdst.reglo));
               list.concat(taicpu.op_reg_reg(xopcode,S_L,hreg,regdst.reghi));
             end;
           OP_AND,OP_OR,OP_XOR:

compiler/m68k/cpupara.pas

@@ -268,7 +268,7 @@ unit cpupara;
                  We also have to figure out a better switch for this, because this is
                  now compiler and platform specific... (KB) }
 
-               if (tprocdef(p).proccalloption in [pocall_syscall,pocall_cdecl,pocall_cppdecl]) and
+               if (tabstractprocdef(p).proccalloption in [pocall_syscall,pocall_cdecl,pocall_cppdecl]) and
                   (target_info.system in [system_m68k_palmos,system_m68k_linux]) and
                   assigned(result.def) and
                   (result.def.typ in [stringdef,pointerdef,classrefdef,objectdef,
@@ -408,9 +408,9 @@ unit cpupara;
                   return a struct by address. we will probably need some kind of a
                   switch to support these various ABIs when generating cdecl calls (KB) }
                 if ((vo_is_funcret in hp.varoptions) and
-                    (tprocdef(p).proccalloption in [pocall_cdecl,pocall_cppdecl]) and
+                    (tabstractprocdef(p).proccalloption in [pocall_cdecl,pocall_cppdecl]) and
                     (target_info.system in [system_m68k_linux]) and
-                    (tprocdef(p).returndef.typ = recorddef)) then
+                    (tabstractprocdef(p).returndef.typ = recorddef)) then
                   begin
                     paraloc^.loc:=LOC_REGISTER;
                     paraloc^.register:=NR_M68K_STRUCT_RESULT_REG;

compiler/nadd.pas

@@ -3604,6 +3604,7 @@ implementation
                begin
                  { if the code generator can handle 32 to 64-bit muls,
                    we're done here }
+                 expectloc:=LOC_REGISTER;
                end
 {$ifndef cpu64bitalu}
               { is there a 64 bit type ? }

compiler/options.pas

@@ -4091,7 +4091,10 @@ begin
       { Set FPU type }
       if not(option.FPUSetExplicitly) then
         begin
-          init_settings.fputype:=fpu_vfpv3_d16
+          if init_settings.cputype < cpu_armv7 then
+            init_settings.fputype:=fpu_vfpv2
+          else
+            init_settings.fputype:=fpu_vfpv3_d16;
         end
       else
         begin

compiler/pass_2.pas

@@ -210,7 +210,14 @@ implementation
             if (not codegenerror) then
              begin
                if (p.location.loc<>p.expectloc) then
+                 begin
+                   if ((p.location.loc=loc_register) and (p.expectloc=loc_cregister))
+                      or ((p.location.loc=loc_fpuregister) and (p.expectloc=loc_cfpuregister))
+                      or ((p.location.loc=loc_reference) and (p.expectloc=loc_creference)) then
+                     Comment(V_Note,'Location ('+tcgloc2str[p.location.loc]+') not equal to expectloc ('+tcgloc2str[p.expectloc]+'): '+nodetype2str[p.nodetype])
+                   else
                      Comment(V_Warning,'Location ('+tcgloc2str[p.location.loc]+') not equal to expectloc ('+tcgloc2str[p.expectloc]+'): '+nodetype2str[p.nodetype]);
+                 end;
                if (p.location.loc=LOC_INVALID) then
                  Comment(V_Warning,'Location not set in secondpass: '+nodetype2str[p.nodetype]);
              end;

compiler/sparcgen/ncpumat.pas

@@ -94,6 +94,7 @@ implementation
          resultreg  : tregister;
          overflowlabel : tasmlabel;
          ai : taicpu;
+         no_overflow : boolean;
       begin
          secondpass(left);
          secondpass(right);
@@ -140,18 +141,30 @@ implementation
 
                  op := divops[true, is_signed(right.resultdef),
                               cs_check_overflow in current_settings.localswitches];
+                 if op=A_NOP then
+                   { current_asmdata.CurrAsmList.concat(tai_comment.create(strpnew('Wrong code generated here'))); }
+                   begin
+                     no_overflow:=true;
+                     op:=divops[true,is_signed(right.resultdef),false];
+                   end
+                 else
+                   no_overflow:=false;
                  if (divider<>NR_NO) then
                    current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op,numerator,divider,resultreg))
                  else
                    current_asmdata.CurrAsmList.concat(taicpu.op_reg_const_reg(op,numerator,right.location.value,resultreg));
 
                  if (nodetype = modn) then
+                   begin
+                     if not no_overflow then
                        begin
                          current_asmdata.getjumplabel(overflowlabel);
                          ai:=taicpu.op_cond_sym(A_Bxx,C_VS,overflowlabel);
                          ai.delayslot_annulled:=true;
                          current_asmdata.CurrAsmList.concat(ai);
+                       end;
                      current_asmdata.CurrAsmList.concat(taicpu.op_reg(A_NOT,resultreg));
+                     if not no_overflow then
                        cg.a_label(current_asmdata.CurrAsmList,overflowlabel);
                      if (divider<>NR_NO) then
                        current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_MULX,resultreg,divider,resultreg))

compiler/symdef.pas

@@ -4561,7 +4561,6 @@ implementation
            end
          else
            begin
-             ppuload_platform(ppufile);
              symtable:=trecordsymtable.create(objrealname^,0,0,0);
              trecordsymtable(symtable).fieldalignment:=shortint(ppufile.getbyte);
              trecordsymtable(symtable).recordalignment:=shortint(ppufile.getbyte);
@@ -4571,6 +4570,9 @@ implementation
              trecordsymtable(symtable).datasize:=ppufile.getasizeint;
              trecordsymtable(symtable).paddingsize:=ppufile.getword;
              ppufile.getsmallset(trecordsymtable(symtable).managementoperators);
+             { position of ppuload_platform call must correspond
+               to position of writeentry in ppuwrite method }
+             ppuload_platform(ppufile);
              trecordsymtable(symtable).ppuload(ppufile);
              { the variantrecdesc is needed only for iso-like new statements new(prec,1,2,3 ...);
                but because iso mode supports no units, there is no need to store the variantrecdesc

compiler/tgobj.pas

@@ -488,6 +488,9 @@ implementation
                if not(hp^.temptype in temptypes) then
                 begin
 {$ifdef EXTDEBUG}
+                  if hp^.temptype = tt_persistent then
+                    Comment(V_Note,'tgobj: (Freetemp) temp at pos '+tostr(pos.val)+ ' has different type ('+TempTypeStr[hp^.temptype]+'), not releasing')
+                  else
                     Comment(V_Warning,'tgobj: (Freetemp) temp at pos '+tostr(pos.val)+ ' has different type ('+TempTypeStr[hp^.temptype]+'), not releasing');
                   list.concat(tai_tempalloc.allocinfo(hp^.pos,hp^.size,'temp has wrong type ('+TempTypeStr[hp^.temptype]+') not releasing'));
 {$endif}

compiler/x86/cgx86.pas

@@ -376,6 +376,10 @@ unit cgx86;
       end;
 
 
+{ Range check must be disabled explicitly as the code serves
+  on three different architecture sizes }
+{$R-}
+
 {****************************************************************************
                        This is private property, keep out! :)
 ****************************************************************************}

packages/ide/compiler/Makefile.fpc

@@ -6,7 +6,7 @@
 main=ide
 
 [require]
-packages=rtl-extra
+packages=rtl rtl-extra
 
 [target]
 units=compunit
@@ -20,7 +20,7 @@ includedir=$(COMPILERDIR) $(COMPILERDIR)/$(PPC_TARGET)
 fpcpackage=y
 
 [default]
-fpcdir=../..
+fpcdir=../../..
 
 [prerules]
 COMPILERDIR=$(FPCDIR)/compiler