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* simplified code for JccAdd2SetccAdd optimization

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git-svn-id: trunk@48122 -
This commit is contained in:
florian 2021-01-09 18:21:49 +00:00
parent efe6b32638
commit 227bd3e904
1 changed files with 9 additions and 8 deletions
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17
compiler/x86/aoptx86.pas
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@ -5693,6 +5693,7 @@ unit aoptx86;
symbol: TAsmSymbol; symbol: TAsmSymbol;
reg: tsuperregister; reg: tsuperregister;
regavailable: Boolean; regavailable: Boolean;
tmpreg: TRegister;
begin begin
result:=false; result:=false;
symbol:=nil; symbol:=nil;
@ -5796,17 +5797,16 @@ unit aoptx86;
((Taicpu(hp1).opcode=A_INC) or (Taicpu(hp1).opcode=A_DEC)) ((Taicpu(hp1).opcode=A_INC) or (Taicpu(hp1).opcode=A_DEC))
) then ) then
begin begin
TransferUsedRegs(TmpUsedRegs);
UpdateUsedRegs(TmpUsedRegs, tai(p.next));
{ search for an available register which is volatile } { search for an available register which is volatile }
regavailable:=false; regavailable:=false;
for reg in tcpuregisterset do for reg in tcpuregisterset do
begin begin
tmpreg:=newreg(R_INTREGISTER,reg,R_SUBL);
if (reg in paramanager.get_volatile_registers_int(current_procinfo.procdef.proccalloption)) and if (reg in paramanager.get_volatile_registers_int(current_procinfo.procdef.proccalloption)) and
not(reg in TmpUsedRegs[R_INTREGISTER].GetUsedRegs) and not(reg in UsedRegs[R_INTREGISTER].GetUsedRegs) and
not(RegInInstruction(newreg(R_INTREGISTER,reg,R_SUBL),hp1)) not(RegInInstruction(tmpreg,hp1))
{$ifdef i386} {$ifdef i386}
{ use only registers which can be accessed byte wise }
and (reg in [RS_EAX,RS_EBX,RS_ECX,RS_EDX]) and (reg in [RS_EAX,RS_EBX,RS_ECX,RS_EDX])
{$endif i386} {$endif i386}
then then
@ -5818,23 +5818,24 @@ unit aoptx86;
if regavailable then if regavailable then
begin begin
TAsmLabel(symbol).decrefs;
Taicpu(p).clearop(0); Taicpu(p).clearop(0);
Taicpu(p).ops:=1; Taicpu(p).ops:=1;
Taicpu(p).is_jmp:=false; Taicpu(p).is_jmp:=false;
Taicpu(p).opcode:=A_SETcc; Taicpu(p).opcode:=A_SETcc;
DebugMsg(SPeepholeOptimization+'JccAdd2SetccAdd',p); DebugMsg(SPeepholeOptimization+'JccAdd2SetccAdd',p);
Taicpu(p).condition:=inverse_cond(Taicpu(p).condition); Taicpu(p).condition:=inverse_cond(Taicpu(p).condition);
Taicpu(p).loadreg(0,newreg(R_INTREGISTER,reg,R_SUBL)); Taicpu(p).loadreg(0,tmpreg);
if getsubreg(Taicpu(hp1).oper[1]^.reg)<>R_SUBL then if getsubreg(Taicpu(hp1).oper[1]^.reg)<>R_SUBL then
begin begin
case getsubreg(Taicpu(hp1).oper[1]^.reg) of case getsubreg(Taicpu(hp1).oper[1]^.reg) of
R_SUBW: R_SUBW:
hp2:=Taicpu.op_reg_reg(A_MOVZX,S_BW,newreg(R_INTREGISTER,reg,R_SUBL), hp2:=Taicpu.op_reg_reg(A_MOVZX,S_BW,tmpreg,
newreg(R_INTREGISTER,reg,R_SUBW)); newreg(R_INTREGISTER,reg,R_SUBW));
R_SUBD, R_SUBD,
R_SUBQ: R_SUBQ:
hp2:=Taicpu.op_reg_reg(A_MOVZX,S_BL,newreg(R_INTREGISTER,reg,R_SUBL), hp2:=Taicpu.op_reg_reg(A_MOVZX,S_BL,tmpreg,
newreg(R_INTREGISTER,reg,R_SUBD)); newreg(R_INTREGISTER,reg,R_SUBD));
else else
Internalerror(2020030601); Internalerror(2020030601);