From 22eb1e099fa15b018ad81c0bdff24462190b7afd Mon Sep 17 00:00:00 2001 From: Karoly Balogh Date: Tue, 15 Mar 2022 10:11:18 +0100 Subject: [PATCH] * m68k: make sure right is in an address register for muln,addn,orn,xorn, before calling the low level cg --- compiler/m68k/n68kadd.pas | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/compiler/m68k/n68kadd.pas b/compiler/m68k/n68kadd.pas index 57e2cca80d..bd7681d9fa 100644 --- a/compiler/m68k/n68kadd.pas +++ b/compiler/m68k/n68kadd.pas @@ -456,6 +456,14 @@ implementation exit; end; + if (right.location.loc in [LOC_REGISTER,LOC_CREGISTER]) and + isaddressregister(right.location.register) and + (nodetype in [muln,andn,orn,xorn]) then + begin + //list.concat(tai_comment.create(strpnew('second_addordinal: move addr to data'))); + hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,cgsize_orddef(def_cgsize(right.resultdef)),false); + end; + if isaddressregister(left.location.register) and (nodetype in [addn,subn]) then location.register := cg.getaddressregister(current_asmdata.CurrAsmList) else