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+ LookForPostindexedPattern
git-svn-id: trunk@22228 -
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parent
acfcb3d853
commit
245d8286d5
@ -50,6 +50,9 @@ Type
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{ outputs a debug message into the assembler file }
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procedure DebugMsg(const s: string; p: tai);
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protected
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function LookForPostindexedPattern(p: taicpu): boolean;
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End;
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TCpuPreRegallocScheduler = class(TAsmScheduler)
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@ -349,6 +352,60 @@ Implementation
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end;
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end;
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{
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optimize
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ldr/str regX,[reg1]
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...
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add/sub reg1,reg1,regY/const
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into
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ldr/str regX,[reg1], regY/const
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}
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function TCpuAsmOptimizer.LookForPostindexedPattern(p: taicpu) : boolean;
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var
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hp1 : tai;
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begin
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Result:=false;
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if (p.oper[1]^.ref^.addressmode=AM_OFFSET) and
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(p.oper[1]^.ref^.index=NR_NO) and
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(p.oper[1]^.ref^.offset=0) and
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GetNextInstructionUsingReg(p, hp1, p.oper[1]^.ref^.base) and
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(hp1.typ=ait_instruction) and
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{ we cannot check NR_DEFAULTFLAGS for modification yet so don't allow a condition }
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(MatchInstruction(hp1, A_ADD, [C_None], [PF_None]) or
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MatchInstruction(hp1, A_SUB, [C_None], [PF_None])) and
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(taicpu(hp1).oper[0]^.reg=p.oper[1]^.ref^.base) and
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(taicpu(hp1).oper[1]^.reg=p.oper[1]^.ref^.base) and
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{ don't apply the optimization if the base register is loaded }
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(p.oper[0]^.reg<>p.oper[1]^.ref^.base) and
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not(RegModifiedBetween(taicpu(hp1).oper[0]^.reg,p,hp1)) then
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begin
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DebugMsg('Peephole Str/LdrAdd/Sub2Str/Ldr Postindex done', p);
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p.oper[1]^.ref^.addressmode:=AM_POSTINDEXED;
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if taicpu(hp1).oper[2]^.typ=top_const then
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begin
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if taicpu(hp1).opcode=A_ADD then
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p.oper[1]^.ref^.offset:=taicpu(hp1).oper[2]^.val
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else
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p.oper[1]^.ref^.offset:=-taicpu(hp1).oper[2]^.val;
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end
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else
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begin
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p.oper[1]^.ref^.index:=taicpu(hp1).oper[1]^.reg;
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if taicpu(hp1).opcode=A_ADD then
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p.oper[1]^.ref^.signindex:=1
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else
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p.oper[1]^.ref^.signindex:=-1;
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end;
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asml.Remove(hp1);
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hp1.Free;
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Result:=true;
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end;
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end;
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function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
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var
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hp1,hp2: tai;
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@ -472,6 +529,7 @@ Implementation
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asml.remove(hp1);
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hp1.free;
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end;
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LookForPostindexedPattern(taicpu(p));
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end;
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A_LDR:
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begin
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@ -534,6 +592,8 @@ Implementation
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hp1.free;
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end;
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end;
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LookForPostindexedPattern(taicpu(p));
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{ Remove superfluous mov after ldr
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changes
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ldr reg1, ref
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