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* remove abt reg for vmtreg

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This commit is contained in:
peter 2003-09-30 19:55:19 +00:00
parent 2771f49e22
commit 2581038501
1 changed files with 14 additions and 5 deletions
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19
compiler/ncgcal.pas
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@ -788,15 +788,16 @@ implementation
{ release self } { release self }
rg.ungetaddressregister(exprasmlist,vmtreg); rg.ungetaddressregister(exprasmlist,vmtreg);
(*
vmtreg2:=rg.getabtregisterint(exprasmlist,OS_ADDR); vmtreg2:=rg.getabtregisterint(exprasmlist,OS_ADDR);
rg.ungetregisterint(exprasmlist,vmtreg2);
cg.a_load_reg_reg(exprasmlist,OS_ADDR,OS_ADDR,vmtreg,vmtreg2); cg.a_load_reg_reg(exprasmlist,OS_ADDR,OS_ADDR,vmtreg,vmtreg2);
{ load virtual method (procvar) } { load virtual method (procvar) }
rg.ungetregisterint(exprasmlist,vmtreg2);
*)
pvreg:=rg.getabtregisterint(exprasmlist,OS_ADDR); pvreg:=rg.getabtregisterint(exprasmlist,OS_ADDR);
reference_reset_base(href,vmtreg2, reference_reset_base(href,vmtreg,
tprocdef(procdefinition)._class.vmtmethodoffset(tprocdef(procdefinition).extnumber)); tprocdef(procdefinition)._class.vmtmethodoffset(tprocdef(procdefinition).extnumber));
rg.ungetregisterint(exprasmlist,pvreg);
cg.a_load_ref_reg(exprasmlist,OS_ADDR,OS_ADDR,href,pvreg); cg.a_load_ref_reg(exprasmlist,OS_ADDR,OS_ADDR,href,pvreg);
{ Load parameters that are in temporary registers in the { Load parameters that are in temporary registers in the
@ -804,6 +805,9 @@ implementation
if assigned(left) then if assigned(left) then
pushparas; pushparas;
{ Release register containing procvar }
rg.ungetregisterint(exprasmlist,pvreg);
{ free the resources allocated for the parameters } { free the resources allocated for the parameters }
freeparas; freeparas;
@ -837,7 +841,6 @@ implementation
location_release(exprasmlist,right.location); location_release(exprasmlist,right.location);
pvreg:=rg.getabtregisterint(exprasmlist,OS_ADDR); pvreg:=rg.getabtregisterint(exprasmlist,OS_ADDR);
rg.ungetregisterint(exprasmlist,pvreg);
{ Only load OS_ADDR from the reference } { Only load OS_ADDR from the reference }
if right.location.loc in [LOC_REFERENCE,LOC_CREFERENCE] then if right.location.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
cg.a_load_ref_reg(exprasmlist,OS_ADDR,OS_ADDR,right.location.reference,pvreg) cg.a_load_ref_reg(exprasmlist,OS_ADDR,OS_ADDR,right.location.reference,pvreg)
@ -850,6 +853,9 @@ implementation
if assigned(left) then if assigned(left) then
pushparas; pushparas;
{ Release register containing procvar }
rg.ungetregisterint(exprasmlist,pvreg);
{ free the resources allocated for the parameters } { free the resources allocated for the parameters }
freeparas; freeparas;
@ -1304,7 +1310,10 @@ begin
end. end.
{ {
$Log$ $Log$
Revision 1.120 2003-09-29 20:58:55 peter Revision 1.121 2003-09-30 19:55:19 peter
* remove abt reg for vmtreg
Revision 1.120 2003/09/29 20:58:55 peter
* optimized releasing of registers * optimized releasing of registers
Revision 1.119 2003/09/28 17:55:03 peter Revision 1.119 2003/09/28 17:55:03 peter