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m68k: added support for FSIN/FCOS. these are software supported on the 68040, so we should have a separate 68040/060 FPU option too, to avoid these in the future.
git-svn-id: trunk@30257 -
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882d42eb86
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258b42de26
@ -496,7 +496,7 @@ type
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// FPU opcodes
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// FPU opcodes
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A_FSXX, A_FSEQ, A_FSNE, A_FSLT, A_FSLE, A_FSGT, A_FSGE:
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A_FSXX, A_FSEQ, A_FSNE, A_FSLT, A_FSLE, A_FSGT, A_FSGE:
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result:=operand_write;
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result:=operand_write;
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A_FABS,A_FSQRT,A_FNEG:
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A_FABS,A_FSQRT,A_FNEG,A_FSIN,A_FCOS:
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if ops = 1 then
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if ops = 1 then
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begin
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begin
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if opnr = 0 then
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if opnr = 0 then
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@ -68,7 +68,7 @@ unit cpubase;
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a_move16,
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a_move16,
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{ coldfire v4 instructions }
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{ coldfire v4 instructions }
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a_mov3q,a_mvz,a_mvs,a_sats,a_byterev,a_ff1,
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a_mov3q,a_mvz,a_mvs,a_sats,a_byterev,a_ff1,
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{ fpu processor instructions - directly supported only. }
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{ fpu processor instructions - directly supported }
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{ ieee aware and misc. condition codes not supported }
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{ ieee aware and misc. condition codes not supported }
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a_fabs,a_fadd,
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a_fabs,a_fadd,
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a_fbeq,a_fbne,a_fbngt,a_fbgt,a_fbge,a_fbnge,
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a_fbeq,a_fbne,a_fbngt,a_fbgt,a_fbge,a_fbnge,
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@ -82,6 +82,8 @@ unit cpubase;
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a_fsflmul,a_ftst,
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a_fsflmul,a_ftst,
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a_ftrapeq,a_ftrapne,a_ftrapgt,a_ftrapngt,a_ftrapge,a_ftrapnge,
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a_ftrapeq,a_ftrapne,a_ftrapgt,a_ftrapngt,a_ftrapge,a_ftrapnge,
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a_ftraplt,a_ftrapnlt,a_ftraple,a_ftrapgl,a_ftrapngl,a_ftrapgle,a_ftrapngle,
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a_ftraplt,a_ftrapnlt,a_ftraple,a_ftrapgl,a_ftrapngl,a_ftrapgle,a_ftrapngle,
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{ fpu instructions - indirectly supported }
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a_fsin,a_fcos,
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{ protected instructions }
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{ protected instructions }
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a_cprestore,a_cpsave,
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a_cprestore,a_cpsave,
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{ fpu unit protected instructions }
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{ fpu unit protected instructions }
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@ -62,7 +62,7 @@ interface
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'move16',
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'move16',
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{ coldfire v4 instructions }
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{ coldfire v4 instructions }
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'mov3q','mvz','mvs','sats','byterev','ff1',
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'mov3q','mvz','mvs','sats','byterev','ff1',
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{ fpu processor instructions - directly supported only. }
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{ fpu processor instructions - directly supported }
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{ ieee aware and misc. condition codes not supported }
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{ ieee aware and misc. condition codes not supported }
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'fabs','fadd',
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'fabs','fadd',
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'fbeq','fbne','fbngt','fbgt','fbge','fbnge',
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'fbeq','fbne','fbngt','fbgt','fbge','fbnge',
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@ -76,6 +76,8 @@ interface
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'fsflmul','ftst',
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'fsflmul','ftst',
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'ftrapeq','ftrapne','ftrapgt','ftrapngt','ftrapge','ftrapnge',
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'ftrapeq','ftrapne','ftrapgt','ftrapngt','ftrapge','ftrapnge',
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'ftraplt','ftrapnlt','ftraple','ftrapgl','ftrapngl','ftrapgle','ftrapngle',
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'ftraplt','ftrapnlt','ftraple','ftrapgl','ftrapngl','ftrapgle','ftrapngle',
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{ fpu instructions - indirectly supported }
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'fsin','fcos',
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{ protected instructions }
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{ protected instructions }
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'cprestore','cpsave',
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'cprestore','cpsave',
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{ fpu unit protected instructions }
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{ fpu unit protected instructions }
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@ -34,18 +34,18 @@ interface
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function first_sqr_real: tnode; override;
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function first_sqr_real: tnode; override;
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function first_sqrt_real: tnode; override;
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function first_sqrt_real: tnode; override;
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{function first_arctan_real: tnode; override;
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{function first_arctan_real: tnode; override;
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function first_ln_real: tnode; override;
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function first_ln_real: tnode; override;}
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function first_cos_real: tnode; override;
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function first_cos_real: tnode; override;
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function first_sin_real: tnode; override;}
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function first_sin_real: tnode; override;
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procedure second_abs_real; override;
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procedure second_abs_real; override;
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procedure second_sqr_real; override;
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procedure second_sqr_real; override;
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procedure second_sqrt_real; override;
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procedure second_sqrt_real; override;
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{procedure second_arctan_real; override;
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{procedure second_arctan_real; override;
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procedure second_ln_real; override;
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procedure second_ln_real; override;}
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procedure second_cos_real; override;
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procedure second_cos_real; override;
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procedure second_sin_real; override;
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procedure second_sin_real; override;
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procedure second_prefetch; override;
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{procedure second_prefetch; override;
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procedure second_abs_long; override;}
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procedure second_abs_long; override;}
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private
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private
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procedure second_do_operation(op: TAsmOp);
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procedure second_do_operation(op: TAsmOp);
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@ -112,6 +112,38 @@ implementation
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end;
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end;
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end;
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end;
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function t68kinlinenode.first_sin_real : tnode;
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begin
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if (cs_fp_emulation in current_settings.moduleswitches) then
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result:=inherited first_sin_real
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else
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begin
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case current_settings.fputype of
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fpu_68881:
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expectloc:=LOC_FPUREGISTER;
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else
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internalerror(2015022203);
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end;
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first_sin_real:=nil;
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end;
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end;
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function t68kinlinenode.first_cos_real : tnode;
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begin
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if (cs_fp_emulation in current_settings.moduleswitches) then
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result:=inherited first_cos_real
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else
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begin
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case current_settings.fputype of
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fpu_68881:
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expectloc:=LOC_FPUREGISTER;
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else
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internalerror(2015022203);
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end;
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first_cos_real:=nil;
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end;
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end;
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procedure t68kinlinenode.second_abs_real;
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procedure t68kinlinenode.second_abs_real;
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begin
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begin
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//current_asmdata.CurrAsmList.concat(tai_comment.create(strpnew('second_abs_real called!')));
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//current_asmdata.CurrAsmList.concat(tai_comment.create(strpnew('second_abs_real called!')));
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@ -147,6 +179,18 @@ implementation
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second_do_operation(A_FSQRT);
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second_do_operation(A_FSQRT);
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end;
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end;
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procedure t68kinlinenode.second_sin_real;
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begin
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//current_asmdata.CurrAsmList.concat(tai_comment.create(strpnew('second_sqrt_real called!')));
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second_do_operation(A_FSIN);
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end;
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procedure t68kinlinenode.second_cos_real;
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begin
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//current_asmdata.CurrAsmList.concat(tai_comment.create(strpnew('second_sqrt_real called!')));
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second_do_operation(A_FCOS);
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end;
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procedure t68kinlinenode.second_do_operation(op: TAsmOp);
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procedure t68kinlinenode.second_do_operation(op: TAsmOp);
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var
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var
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href: TReference;
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href: TReference;
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