paweld/fpc
1
0
Fork 0
mirror of https://gitlab.com/freepascal.org/fpc/source.git synced 2025-08-12 04:46:12 +02:00
Code Issues Packages Projects Releases Wiki Activity

* better register variable allocation in -Or mode

Browse Source
This commit is contained in:
florian 2000-02-04 08:47:10 +00:00
parent 5af9c2d923
commit 26fc3fb886
3 changed files with 48 additions and 67 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

81
compiler/pass_2.pas
View File

@ -458,7 +458,7 @@ implementation
end; end;
var var
{ the array ranges are oveestimated !!! } { the array ranges are overestimated !!! }
{ max(maxvarregs,maxfpuvarregs) would be } { max(maxvarregs,maxfpuvarregs) would be }
{ enough } { enough }
regvars : array[1..maxvarregs+maxfpuvarregs] of pvarsym; regvars : array[1..maxvarregs+maxfpuvarregs] of pvarsym;
@ -467,40 +467,32 @@ implementation
parasym : boolean; parasym : boolean;
procedure searchregvars(p : pnamedindexobject); procedure searchregvars(p : pnamedindexobject);
var var
i,j,k : longint; i,j,k : longint;
begin begin
if (psym(p)^.typ=varsym) and (vo_regable in pvarsym(p)^.varoptions) then if (psym(p)^.typ=varsym) and (vo_regable in pvarsym(p)^.varoptions) then
begin begin
{ walk through all momentary register variables } j:=pvarsym(p)^.refs;
{ parameter get a less value }
if parasym then
begin
if cs_littlesize in aktglobalswitches then
dec(j,1)
else
dec(j,100);
end;
for i:=1 to maxvarregs do for i:=1 to maxvarregs do
begin begin
{ free register ? } if (regvars[i]=nil) or ((j>regvars_refs[i]) and (j>0)) then
if regvars[i]=nil then
begin
regvars[i]:=pvarsym(p);
regvars_para[i]:=parasym;
break;
end;
{ else throw out a variable ? }
j:=pvarsym(p)^.refs;
{ parameter get a less value }
if parasym then
begin
if cs_littlesize in aktglobalswitches then
dec(j,1)
else
dec(j,100);
end;
if (j>regvars_refs[i]) and (j>0) then
begin begin
for k:=maxvarregs-1 downto i do for k:=maxvarregs-1 downto i do
begin begin
regvars[k+1]:=regvars[k]; regvars[k+1]:=regvars[k];
regvars_para[k+1]:=regvars_para[k]; regvars_para[k+1]:=regvars_para[k];
regvars_refs[k+1]:=regvars_refs[k];
end; end;
{ calc the new refs
pvarsym(p)^.refs:=j; }
regvars[i]:=pvarsym(p); regvars[i]:=pvarsym(p);
regvars_para[i]:=parasym; regvars_para[i]:=parasym;
regvars_refs[i]:=j; regvars_refs[i]:=j;
@ -514,38 +506,30 @@ implementation
procedure searchfpuregvars(p : pnamedindexobject); procedure searchfpuregvars(p : pnamedindexobject);
var var
i,j,k : longint; i,j,k : longint;
begin begin
if (psym(p)^.typ=varsym) and (vo_fpuregable in pvarsym(p)^.varoptions) then if (psym(p)^.typ=varsym) and (vo_fpuregable in pvarsym(p)^.varoptions) then
begin begin
{ walk through all momentary register variables } j:=pvarsym(p)^.refs;
{ parameter get a less value }
if parasym then
begin
if cs_littlesize in aktglobalswitches then
dec(j,1)
else
dec(j,100);
end;
for i:=1 to maxfpuvarregs do for i:=1 to maxfpuvarregs do
begin begin
{ free register ? }
if regvars[i]=nil then
begin
regvars[i]:=pvarsym(p);
regvars_para[i]:=parasym;
break;
end;
{ else throw out a variable ? } { else throw out a variable ? }
j:=pvarsym(p)^.refs;
{ parameter get a less value }
if parasym then
begin
if cs_littlesize in aktglobalswitches then
dec(j,1)
else
dec(j,100);
end;
if (j>regvars_refs[i]) and (j>0) then if (j>regvars_refs[i]) and (j>0) then
begin begin
for k:=maxfpuvarregs-1 downto i do for k:=maxfpuvarregs-1 downto i do
begin begin
regvars[k+1]:=regvars[k]; regvars[k+1]:=regvars[k];
regvars_para[k+1]:=regvars_para[k]; regvars_para[k+1]:=regvars_para[k];
regvars_refs[k+1]:=regvars_refs[k];
end; end;
{ calc the new refs
pvarsym(p)^.refs:=j; }
regvars[i]:=pvarsym(p); regvars[i]:=pvarsym(p);
regvars_para[i]:=parasym; regvars_para[i]:=parasym;
regvars_refs[i]:=j; regvars_refs[i]:=j;
@ -623,7 +607,7 @@ implementation
end; end;
*) *)
{ $ifdef dummy} { $ifdef dummy}
if (p^.registers32<4) then if (p^.registers32<maxvarregs) then
begin begin
for i:=1 to maxvarregs do for i:=1 to maxvarregs do
regvars[i]:=nil; regvars[i]:=nil;
@ -643,12 +627,13 @@ implementation
{ it is nonsens, to copy the variable to } { it is nonsens, to copy the variable to }
{ a register because we need then much } { a register because we need then much }
{ too pushes ? } { too pushes ? }
{
if reg_pushes[varregs[i]]>=regvars[i]^.refs then if reg_pushes[varregs[i]]>=regvars[i]^.refs then
begin begin
regvars[i]:=nil; regvars[i]:=nil;
goto nextreg; goto nextreg;
end; end;
}
{ register is no longer available for } { register is no longer available for }
{ expressions } { expressions }
{ search the register which is the most } { search the register which is the most }
@ -725,6 +710,9 @@ implementation
{ dummy } { dummy }
regsize:=S_W; regsize:=S_W;
end; end;
if cs_asm_source in aktglobalswitches then
procinfo^.aktentrycode^.insert(new(pai_asm_comment,init(strpnew(tostr(p^.registers32)+
' registers necessary to evaluate expressions'))));
for i:=1 to maxvarregs do for i:=1 to maxvarregs do
begin begin
if assigned(regvars[i]) then if assigned(regvars[i]) then
@ -850,7 +838,10 @@ implementation
end. end.
{ {
$Log$ $Log$
Revision 1.52 2000-01-22 15:58:12 jonas Revision 1.53 2000-02-04 08:47:10 florian
* better register variable allocation in -Or mode
Revision 1.52 2000/01/22 15:58:12 jonas
* forgot to commit a procedure for -dlogsecondpass the last time * forgot to commit a procedure for -dlogsecondpass the last time
Revision 1.51 2000/01/21 12:16:53 jonas Revision 1.51 2000/01/21 12:16:53 jonas
@ -975,4 +966,4 @@ end.
Revision 1.21 1999/05/17 21:57:11 florian Revision 1.21 1999/05/17 21:57:11 florian
* new temporary ansistring handling * new temporary ansistring handling
} }

25
compiler/symsym.inc
View File

@ -957,30 +957,14 @@
varoptions:=[]; varoptions:=[];
{ can we load the value into a register ? } { can we load the value into a register ? }
if tt.def^.is_intregable then if tt.def^.is_intregable then
{$ifdef INCLUDEOK}
include(varoptions,vo_regable) include(varoptions,vo_regable)
{$else}
varoptions:=varoptions+[vo_regable]
{$endif}
else else
{$ifdef INCLUDEOK}
exclude(varoptions,vo_regable); exclude(varoptions,vo_regable);
{$else}
varoptions:=varoptions-[vo_regable];
{$endif}
if tt.def^.is_fpuregable then if tt.def^.is_fpuregable then
{$ifdef INCLUDEOK}
include(varoptions,vo_fpuregable) include(varoptions,vo_fpuregable)
{$else}
varoptions:=varoptions+[vo_fpuregable]
{$endif}
else else
{$ifdef INCLUDEOK} exclude(varoptions,vo_fpuregable);
exclude(varoptions,vo_regable);
{$else}
varoptions:=varoptions-[vo_fpuregable];
{$endif}
reg:=R_NO; reg:=R_NO;
end; end;
@ -2138,7 +2122,10 @@
{ {
$Log$ $Log$
Revision 1.136 2000-01-07 01:14:40 peter Revision 1.137 2000-02-04 08:47:10 florian
* better register variable allocation in -Or mode
Revision 1.136 2000/01/07 01:14:40 peter
* updated copyright to 2000 * updated copyright to 2000
Revision 1.135 2000/01/03 19:26:04 peter Revision 1.135 2000/01/03 19:26:04 peter
@ -2267,4 +2254,4 @@
Revision 1.104 1999/07/27 23:42:21 peter Revision 1.104 1999/07/27 23:42:21 peter
* indirect type referencing is now allowed * indirect type referencing is now allowed
} }

9
compiler/tcadd.pas
View File

@ -857,7 +857,7 @@ implementation
p^.left:=gentypeconvnode(p^.left,bestrealdef^); p^.left:=gentypeconvnode(p^.left,bestrealdef^);
firstpass(p^.left); firstpass(p^.left);
firstpass(p^.right); firstpass(p^.right);
calcregisters(p,1,1,0); calcregisters(p,0,1,0);
p^.location.loc:=LOC_FPU; p^.location.loc:=LOC_FPU;
end; end;
convdone:=true; convdone:=true;
@ -1254,7 +1254,10 @@ implementation
end. end.
{ {
$Log$ $Log$
Revision 1.63 2000-01-07 01:14:43 peter Revision 1.64 2000-02-04 08:47:10 florian
* better register variable allocation in -Or mode
Revision 1.63 2000/01/07 01:14:43 peter
* updated copyright to 2000 * updated copyright to 2000
Revision 1.62 2000/01/04 20:10:20 florian Revision 1.62 2000/01/04 20:10:20 florian
@ -1371,4 +1374,4 @@ end.
* some fixes for qword * some fixes for qword
* start of register calling conventions * start of register calling conventions
} }