* Tests for i40474 and i40475 (BIC issue on AArch64 and incorrect shifter/extender mnemonics respectively)

This commit is contained in:
J. Gareth "Curious Kit" Moreton 2023-10-19 19:22:22 +01:00 committed by FPK
parent 23e514621d
commit 286c823e27
6 changed files with 202 additions and 0 deletions

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tests/webtbs/tw40474a.pp Normal file
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{ %CPU=AARCH64 }
program tw40474a;
{ This test evaluates the correct interpretation of the BIC mnemonic. It is
supposed to have three operands, but the compiler mistakenly treated it as
if it only had 2 (and an optional shifter operand) }
{ Test a = 32-bit registers, no shift }
function ClearMaskedBits(const Input, Mask: LongWord): LongWord; assembler; nostackframe;
asm
BIC W0, W0, W1
end;
const
Inputs: array[0..7] of LongWord = (1, 2, 3, LongWord($FFFFFFFF), 6, 7, 9, LongWord($FFFFFFFF));
Masks: array[0..7] of LongWord = (1, 1, 1, LongWord($80000001), 5, 5, 5, LongWord($FFFFFFFF));
Expected: array[0..7] of LongWord = (0, 2, 2, LongWord($7FFFFFFE), 2, 2, 8, 0);
var
Count: Integer;
Output: LongWord;
begin
for Count := Low(Inputs) to High(Inputs) do
begin
Output := ClearMaskedBits(Inputs[Count], Masks[Count]);
if (Output <> Expected[Count]) then
begin
WriteLn('FAIL: BIC($', HexStr(Inputs[Count], 8), ', $', HexStr(Masks[Count], 8), '... expected $', HexStr(Expected[Count], 8), ' but got $', HexStr(Output, 8));
Halt(1);
end;
end;
WriteLn('ok');
end.

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tests/webtbs/tw40474b.pp Normal file
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{ %CPU=AARCH64 }
program tw40474b;
{ This test evaluates the correct interpretation of the BIC mnemonic. It is
supposed to have three operands, but the compiler mistakenly treated it as
if it only had 2 (and an optional shifter operand) }
{ Test a = 64-bit registers, no shift }
function ClearMaskedBits(const Input, Mask: QWord): QWord; assembler; nostackframe;
asm
BIC X0, X0, X1
end;
const
Inputs: array[0..7] of QWord = (1, 2, 3, QWord($FFFFFFFFFFFFFFFF), 6, 7, 9, QWord($FFFFFFFFFFFFFFFF));
Masks: array[0..7] of QWord = (1, 1, 1, QWord($8000000000000001), 5, 5, 5, QWord($FFFFFFFFFFFFFFFF));
Expected: array[0..7] of QWord = (0, 2, 2, QWord($7FFFFFFFFFFFFFFE), 2, 2, 8, 0);
var
Count: Integer;
Output: QWord;
begin
for Count := Low(Inputs) to High(Inputs) do
begin
Output := ClearMaskedBits(Inputs[Count], Masks[Count]);
if (Output <> Expected[Count]) then
begin
WriteLn('FAIL: BIC($', HexStr(Inputs[Count], 16), ', $', HexStr(Masks[Count], 16), '... expected $', HexStr(Expected[Count], 16), ' but got $', HexStr(Output, 16));
Halt(1);
end;
end;
WriteLn('ok');
end.

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tests/webtbs/tw40474c.pp Normal file
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{ %CPU=AARCH64 }
program tw40474c;
{ This test evaluates the correct interpretation of the BIC mnemonic. It is
supposed to have three operands, but the compiler mistakenly treated it as
if it only had 2 (and an optional shifter operand) }
{ Test c = 32-bit registers, ROR-type shift of 12 }
function ClearMaskedBits(const Input, Mask: LongWord): LongWord; assembler; nostackframe;
asm
BIC W0, W0, W1, ROR #12
end;
const
Inputs: array[0..7] of LongWord = (1, 2, 3, LongWord($FFFFFFFF), 6, 7, 9, LongWord($FFFFFFFF));
Masks: array[0..7] of LongWord = ($1000, $1000, $1000, LongWord($00001800), $5000, $5000, $5000, LongWord($FFFFFFFF));
Expected: array[0..7] of LongWord = (0, 2, 2, LongWord($7FFFFFFE), 2, 2, 8, 0);
var
Count: Integer;
Output: LongWord;
begin
for Count := Low(Inputs) to High(Inputs) do
begin
Output := ClearMaskedBits(Inputs[Count], Masks[Count]);
if (Output <> Expected[Count]) then
begin
WriteLn('FAIL: BIC($', HexStr(Inputs[Count], 8), ', $', HexStr(Masks[Count], 8), '... expected $', HexStr(Expected[Count], 8), ' but got $', HexStr(Output, 8));
Halt(1);
end;
end;
WriteLn('ok');
end.

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tests/webtbs/tw40474d.pp Normal file
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{ %CPU=AARCH64 }
program tw40474d;
{ This test evaluates the correct interpretation of the BIC mnemonic. It is
supposed to have three operands, but the compiler mistakenly treated it as
if it only had 2 (and an optional shifter operand) }
{ Test b = 64-bit registers, ROR-type shift of 52 }
function ClearMaskedBits(const Input, Mask: QWord): QWord; assembler; nostackframe;
asm
BIC X0, X0, X1, ROR #52
end;
const
Inputs: array[0..7] of QWord = (1, 2, 3, QWord($FFFFFFFFFFFFFFFF), 6, 7, 9, QWord($FFFFFFFFFFFFFFFF));
Masks: array[0..7] of QWord = ($0010000000000000, $0010000000000000, $0010000000000000, QWord($0018000000000000), $0050000000000000, $0050000000000000, $0050000000000000, QWord($FFFFFFFFFFFFFFFF));
Expected: array[0..7] of QWord = (0, 2, 2, QWord($7FFFFFFFFFFFFFFE), 2, 2, 8, 0);
var
Count: Integer;
Output: QWord;
begin
for Count := Low(Inputs) to High(Inputs) do
begin
Output := ClearMaskedBits(Inputs[Count], Masks[Count]);
if (Output <> Expected[Count]) then
begin
WriteLn('FAIL: BIC($', HexStr(Inputs[Count], 16), ', $', HexStr(Masks[Count], 16), '... expected $', HexStr(Expected[Count], 16), ' but got $', HexStr(Output, 16));
Halt(1);
end;
end;
WriteLn('ok');
end.

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tests/webtbs/tw40474e.pp Normal file
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{ %CPU=AARCH64 }
program tw40474e;
{ This test evaluates the correct interpretation of the BIC mnemonic. It is
supposed to have three operands, but the compiler mistakenly treated it as
if it only had 2 (and an optional shifter operand) }
{ Test a = 32-bit registers, immediatre operand (is converted into equivalent machine code for AND) }
function ClearFirstAndLastBits(const Input: LongWord): LongWord; assembler; nostackframe;
asm
BIC W0, W0, #0x80000001
end;
const
Inputs: array[0..3] of LongWord = (1, 2, 3, LongWord($FFFFFFFF));
Expected: array[0..3] of LongWord = (0, 2, 2, LongWord($7FFFFFFE));
var
Count: Integer;
Output: LongWord;
begin
for Count := Low(Inputs) to High(Inputs) do
begin
Output := ClearFirstAndLastBits(Inputs[Count]);
if (Output <> Expected[Count]) then
begin
WriteLn('FAIL: BIC($', HexStr(Inputs[Count], 8), ', $80000001)... expected $', HexStr(Expected[Count], 8), ' but got $', HexStr(Output, 8));
Halt(1);
end;
end;
WriteLn('ok');
end.

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{ %CPU=AARCH64 }
program tw40474f;
{ This test evaluates the correct interpretation of the BIC mnemonic. It is
supposed to have three operands, but the compiler mistakenly treated it as
if it only had 2 (and an optional shifter operand) }
{ Test a = 64-bit registers, immediatre operand (is converted into equivalent machine code for AND) }
function ClearFirstAndLastBits(const Input: QWord): QWord; assembler; nostackframe;
asm
BIC X0, X0, #0x8000000000000001
end;
const
Inputs: array[0..3] of QWord = (1, 2, 3, QWord($FFFFFFFFFFFFFFFF));
Expected: array[0..3] of QWord = (0, 2, 2, QWord($7FFFFFFFFFFFFFFE));
var
Count: Integer;
Output: QWord;
begin
for Count := Low(Inputs) to High(Inputs) do
begin
Output := ClearFirstAndLastBits(Inputs[Count]);
if (Output <> Expected[Count]) then
begin
WriteLn('FAIL: BIC($', HexStr(Inputs[Count], 16), ', $80000000000001)... expected $', HexStr(Expected[Count], 16), ' but got $', HexStr(Output, 16));
Halt(1);
end;
end;
WriteLn('ok');
end.