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+ initial code in aoptcpu for i8086: make use of lds/les
git-svn-id: trunk@31861 -
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@ -28,14 +28,78 @@ unit aoptcpu;
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Interface
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Interface
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uses
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uses
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cpubase, aoptobj, aoptcpub, aopt;
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cpubase, aoptobj, aoptcpub, aopt,
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aasmtai;
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Type
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Type
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TCpuAsmOptimizer = class(TAsmOptimizer)
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TCpuAsmOptimizer = class(TAsmOptimizer)
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function PeepHoleOptPass1Cpu(var p : tai) : boolean; override;
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End;
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End;
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Implementation
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Implementation
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uses
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verbose,
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aoptx86,
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aasmcpu;
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function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p : tai) : boolean;
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var
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hp1 : tai;
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hp2 : tai;
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begin
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result:=false;
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case p.typ of
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ait_instruction:
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begin
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case taicpu(p).opcode of
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A_MOV:
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begin
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if MatchInstruction(p,A_MOV,[S_W]) and
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MatchOpType(p,top_ref,top_reg) and
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GetNextInstruction(p, hp1) and
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MatchInstruction(hp1,A_MOV,[S_W]) and
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MatchOpType(hp1,top_ref,top_reg) and
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GetNextInstruction(hp1, hp2) and
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MatchInstruction(hp2,A_MOV,[S_W]) and
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MatchOpType(hp2,top_reg,top_reg) and
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not(OpsEqual(taicpu(p).oper[1]^,taicpu(hp1).oper[1]^)) and
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OpsEqual(taicpu(hp1).oper[1]^,taicpu(hp2).oper[0]^) and
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(MatchOperand(taicpu(hp2).oper[1]^,NR_ES) or MatchOperand(taicpu(hp2).oper[1]^,NR_DS)) and
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(taicpu(p).oper[0]^.ref^.base=taicpu(hp1).oper[0]^.ref^.base) and
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(taicpu(p).oper[0]^.ref^.index=taicpu(hp1).oper[0]^.ref^.index) and
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(taicpu(p).oper[0]^.ref^.segment=taicpu(hp1).oper[0]^.ref^.segment) and
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(taicpu(p).oper[0]^.ref^.symbol=taicpu(hp1).oper[0]^.ref^.symbol) and
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(taicpu(p).oper[0]^.ref^.relsymbol=taicpu(hp1).oper[0]^.ref^.relsymbol) and
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(taicpu(p).oper[0]^.ref^.offset+2=taicpu(hp1).oper[0]^.ref^.offset) and
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assigned(FindRegDealloc(taicpu(hp2).oper[0]^.reg,tai(hp2.Next))) then
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begin
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case taicpu(hp2).oper[1]^.reg of
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NR_DS:
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taicpu(p).opcode:=A_LDS;
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NR_ES:
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taicpu(p).opcode:=A_LES;
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else
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internalerror(2015092601);
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end;
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asml.remove(hp1);
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hp1.free;
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asml.remove(hp2);
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hp2.free;
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result:=true;
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end;
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end;
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end
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end
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end;
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end;
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begin
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begin
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casmoptimizer:=TCpuAsmOptimizer;
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casmoptimizer:=TCpuAsmOptimizer;
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end.
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end.
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@ -38,6 +38,7 @@
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S_YMM
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S_YMM
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);
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);
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TOpSizes = set of topsize;
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{*****************************************************************************
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{*****************************************************************************
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Registers
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Registers
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